Understanding Radiation- and Hot Carrier-Induced Damage Processes in SiGe HBTs Using Mixed-Mode Electrical Stress

Cheng, Peng; Jun, Bongim; Sutton, A.K.; Appaswamy, Aravind; Zhu, Cun; Cressler, John D.; Schrimpf, R.D.; Fleetwood, D. M.

doi:10.1109/tns.2007.909985

Cited by 18 publications

(1 citation statement)

References 23 publications

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“…In order to create a trap a carrier must: 1) obtain sufficient energy to create a trap; 2) get redirected to the EB or STI oxide; and 3) not undergo a subsequent energy-robbing collision before finally reaching the oxide [7], [9], [10]. These requirements are implemented in the model by probability (1)-(3), respectively.…”

Section: Damage Physics Of Mixed-mode Stress Degradationmentioning

confidence: 99%

Bias- and Temperature-Dependent Accumulated Stress Modeling of Mixed-Mode Damage in SiGe HBTs

Raghunathan

Chakraborty

Bantu

et al. 2015

IEEE Trans. Electron Devices

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This paper uses a physics-based TCAD degradation model to examine the accumulated stress damage of SiGe HBTs under pseudodynamic mixed-mode stress as a function of both electrical stress bias and temperature. The temperature dependence of mixed-mode stress damage is fully explored, beginning with impact-ionization calibration, and then by identifying and calibrating the dependence of scattering length and hydrogen diffusion parameters of the degradation model. After calibrating the model across electrical bias and temperature, the effectiveness and limitations of accumulated stress damage while varying electrical bias and while varying temperature are identified, and the implications of this aging model for circuit designers are discussed.Index Terms-Accumulated mixed-mode stress degradation, hot-carrier damage, lucky electron model, reliability, safe operating area (SOA), SiGe HBT, temperature dependence.

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Section: Damage Physics Of Mixed-mode Stress Degradationmentioning

confidence: 99%

Bias- and Temperature-Dependent Accumulated Stress Modeling of Mixed-Mode Damage in SiGe HBTs

Raghunathan

Chakraborty

Bantu

et al. 2015

IEEE Trans. Electron Devices

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A Comparison of Hot Carrier and 50 MeV Li3+ Ion Induced Degradation in the Electrical Characteristics of Advanced 200 GHz SiGe HBT

Praveen

Pushpa²,

Bharathi

et al. 2014

Physics of Semiconductor Devices

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Assessing Electronics with Advanced 3D X-ray Imaging Techniques, Nanoscale Tomography, and Deep Learning

Villarraga-Gómez,

Crosby,

Terada

et al. 2024

J Fail. Anal. and Preven.

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This paper presents advanced workflows that combine 3D X-ray microscopy (XRM), nanoscale tomography, and deep learning (DL) to generate a detailed visualization of the interior of electronic devices and assemblies to enable the study of internal components for failure analysis (FA). Newly developed techniques, such as the integration of DL-based algorithms for 3D image reconstruction to improve scan quality through increased contrast and denoising, are also discussed in this article. In addition, a DL-based tool called DeepScout is presented. DeepScout uses 3D XRM scans in targeted regions of interest as training data for upscaling high-resolution in a low-resolution dataset, of a wider field of view, using a neural network model. Ultimately, these workflows can be run independently or complementary to other multiscale correlative microscopy evaluations, e.g., electron microscopy, and they will provide valuable insights into the inner workings of electronic packages and integrated circuits at multiple length scales, from macroscopic features on electronic devices (i.e., hundreds of mm) to microscopic details in electronic components (in the tens of nm). Understanding advanced electronic systems through X-ray imaging and machine learning—perhaps complemented with some additional correlative microscopy investigations—can speed development time, increase cost efficiency, and simplify FA and quality inspection of printed circuit boards (PCBs) and electronic devices assembled with new emerging technologies.

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Understanding Radiation- and Hot Carrier-Induced Damage Processes in SiGe HBTs Using Mixed-Mode Electrical Stress

Cited by 18 publications

References 23 publications

Bias- and Temperature-Dependent Accumulated Stress Modeling of Mixed-Mode Damage in SiGe HBTs

Bias- and Temperature-Dependent Accumulated Stress Modeling of Mixed-Mode Damage in SiGe HBTs

A Comparison of Hot Carrier and 50 MeV Li3+ Ion Induced Degradation in the Electrical Characteristics of Advanced 200 GHz SiGe HBT

Assessing Electronics with Advanced 3D X-ray Imaging Techniques, Nanoscale Tomography, and Deep Learning

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