Understanding sources of inefficiency in general-purpose chips

Abstract

Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance and energy efficiency. This paper explores the sources of these performance and energy overheads in general-purpose processing systems by quantifying the overheads of a 720p HD H.264 encoder running on a general-purpose CMP system. It then explores methods to eliminate these overheads by transforming the CPU into a specialized system for H.264 encoding. We evaluate the gains from customizations useful to broad classes of algorithms, such as SIMD units, as well as those specific to particular computation, such as customized storage and functional units.The ASIC is 500x more energy efficient than our original fourprocessor CMP. Broadly, applicable optimizations improve performance by 10x and energy by 7x. However, the very low energy costs of actual core ops (100s fJ in 90nm) mean that over 90% of the energy used in these solutions is still "overhead". Achieving ASIC-like performance and efficiency requires algorithm-specific optimizations. For each sub-algorithm of H.264, we create a large, specialized functional unit that is capable of executing 100s of operations per instruction. This improves performance and energy by an additional 25x and the final customized CMP matches an ASIC solution's performance within 3x of its energy and within comparable area.

ISA-independent workload characterization and its implications for specialized architectures

“…Hameed et al explore the sources of performance and energy overheads in generalpurpose processors by quantifying the overheads of a H.264 encoder running on a general-purpose system [10]. They identify that fully specialized hardware can be 500x more energy efficient than general-purpose processors, and in order to achieve ASIC-like energy efficiency designers need to apply customized storage and functional units tuned to the specific application.…”

The Paramountcy of Reconfigurable Computing

“…Meanwhile a growing variety of hardwired accelerators comes along with each PC, laptop, or other kinds computers, called ASICs (Application-specific Integrated Circuits). The tail is wagging the dog ( 231,232 . Also a four processor Tensilica-based CMP is 500x worse in 231,232 .…”

“…The tail is wagging the dog ( 231,232 . Also a four processor Tensilica-based CMP is 500x worse in 231,232 .…”

“…Just about 5% of the hardware, the ALU, is doing the processing, whereas the other 95% hardware are overhead (Figure 17) 231 . But orders of magnitude more inefficiency is caused by multiple overhead phenomena in the software required to follow this machine paradigm.…”

Floating Point Architecture Extensions for Optimized Matrix Factorization

“…By contrast, accelerator designs achieve orders of magnitude improvement in power and area efficiency by specializing the compute data-path for only a specific application domain [1], [2]. They remove unnecessary overheads in general purpose architectures and use more fine-grain compute engines instead.…”