Understanding the evolution of trench profiles in the via-first dual damascene integration scheme

Kropewnicki, Tom; Doan, K.; Tang, Betty; Björkman, C. H.

doi:10.1116/1.1345897

Cited by 7 publications

(5 citation statements)

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“…For the copper/low-k backend interconnects, a via-first patterning scheme has been widely used in a dual damascene integration pro- cess flow. 34,35 In the via etch process, highly selective etching of the low-k ILD against the underlying etch-stop layer, such as SiC x N y in our case, is required. This is to ensure sufficient thickness of SiC x N y film to protect the underlying copper layer from plasma induced damage and oxidation due to diffusion of oxygen.…”

Section: Resultsmentioning

confidence: 99%

Low-k SiC_xN_yFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Chen

Leu

2012

J. Electrochem. Soc.

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Low-k silicon carbonitride (SiC x N y ) films with k of 3.6-4.6 were prepared by radio frequency plasma-enhanced chemical vapor deposition at 25 to 400 • C under low power density of 0.15 W/cm 3 , using a single source precursor, 1, 3, 5-trimethyl-1, 3, 5trivinylcyclotrisilazane (VSZ), and Ar. At lower deposition temperatures (≤ 200 • C), most cyclic VSZ structures were preserved in the SiC x N y films, resulting in a lower density (1.60-1.76 g/cm 3 ), a lower dielectric constant (k∼3.6-3.9) and a fairly good elastic modulus of 22.0-25.0 GPa. When the deposition temperature was raised to 400 • C, the cyclic N-Si-N linkages were reformed to a dense Si-N structure, with the desorption of CH x bonds, resulting in higher density (2.0 g/cm 3 ), a dielectric constant of 4.6, and an excellent elastic modulus of 65.2 GPa. The leakage current density of SiC x N y films was reduced from 1.5×10 −6 to 4.0×10 −8 A/cm 2 at 1 MV/cm, upon increasing the deposition temperature from 25 • C to 400 • C. The conduction mechanism of the SiC x N y films, except the film deposited at 400 • C and tested under higher electric field, exhibited Schottky emission due to few charged defects by using a cyclic VSZ precursor and a lower plasma power density of 0.15 W/cm 3 .

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Section: Resultsmentioning

confidence: 99%

Low-k SiC_xN_yFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Chen

Leu

2012

J. Electrochem. Soc.

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“…Effect of etching chemistry.-Jiang et al discovered that the N 2 :Ar ratio in C 4 F 8 /N 2 /Ar chemistry is the key parameter in controlling the severity of the oxide fencing. 6 The oxide fencing can be eliminated at a low N 2 :Ar ratio. It is believed that a low N 2 :Ar ratio increases physical sputtering, thus shift the angular dependent etching yield curve in a C 4 F 8 chemistry towards C 2 F 6 chemistry.…”

Section: Simulation Results and Discussionmentioning

confidence: 99%

“…In the via-first dual damascene etch processes, some undesirable etching artifacts, including microtrenching, trench bottom rounding, faceting of the existing via holes, and oxide fencing around the via hole, have been observed. 5,6 Figure 2 shows the oxide fencing after trench etch. These particular features can cause problems such as voids during copper fill of the dual damascene structure, and ultimately increased via resistance and device failure.…”

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Profile Evolution Simulation of Oxide Fencing during Via-First Dual Damascene Etching Processes

Jin

Sawin

2003

J. Electrochem. Soc.

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The introduction of copper interconnects has increased the use of dual damascene etching processes, which leads to new challenges for feature profile control. Oxide fencing around vias during the trench etch of the via-first dual damascene scheme can be detrimental to the device performance and therefore need to be eliminated. A systematic study of oxide fencing formation during via-first dual damascene etching processes is presented. A Monte Carlo technique associated with surface kinetics and cell removal algorithm is used to simulate the profile evolution, and the simulation results qualitatively agree with the experimental results taken from literature. The simulation indicated that the feature profile evolution is controlled by both the ion and neutral flux distribution along the etching surface and angular dependent etching yield. The shape of via, the SiO 2 :BARC etching selectivity, and etching chemistry can affect the oxide fencing. Bowed via can eliminate the oxide fencing, and tapered via will result in severe oxide fencing. Reducing etching selectivity can also control the height of oxide fencing, but it does not seem to be a practical solution. Less polymerizing chemistry causes much less severe oxide fencing than does more polymerizing chemistry. The simulation can thus serve as a useful guide for searching optimal profile evolution control conditions.

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“…More critically, the stop layer material left behind (beneath the masked region) can affect the performance of the device being manufactured. This is the case in the dual damascene etch [4], where the relatively high dielectric constant of the stop layer, increases the capacitance, so reducing the device speed [5]. Therefore it would be advantageous to utilize a probing wavelength where the material is transparent.…”

Section: Absorbing Materials and The Application Of Infrared Probing ...mentioning

confidence: 99%

Infrared interference patterns for new capabilities in laser end point detection

Heason¹,

Spencer²

2003

J. Phys. D: Appl. Phys.

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Standard laser interferometry is used in dry etch fabrication of semiconductor and MEMS devices to measure etch depth, rate and to detect the process end point. However, many wafer materials, such as silicon are absorbing at probing wavelengths in the visible, severely limiting the amount of information that can be obtained using this technique. At infrared (IR) wavelengths around 1500 nm and above, silicon is highly transparent. In this paper we describe an instrument that can be used to monitor etch depth throughout a thru-wafer etch. The provision of this information could eliminate the requirement of an `etch stop' layer and improve the performance of fabricated devices.We have added a further new capability by using tuneable lasers to scan through wavelengths in the near IR to generate an interference pattern. Fitting a theoretical curve to this interference pattern gives in situ measurement of film thickness. Whereas conventional interferometry would only allow etch depth to be monitored in real time, we can use a pre-etch thickness measurement to terminate the etch on a remaining thickness of film material.This paper discusses the capabilities of, and the opportunities offered by, this new technique and gives examples of applications in MEMS and waveguides.

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Understanding the evolution of trench profiles in the via-first dual damascene integration scheme

Abstract: Articles you may be interested inReview of trench and via plasma etch issues for copper dual damascene in undoped and fluorine-doped silicate glass oxide Experimental characterization and modeling of the reliability of three-terminal dual-damascene Cu interconnect trees

Cited by 7 publications

References 0 publications

Low-k SiC_xN_yFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Low-k SiC_xN_yFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Profile Evolution Simulation of Oxide Fencing during Via-First Dual Damascene Etching Processes

Infrared interference patterns for new capabilities in laser end point detection

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Understanding the evolution of trench profiles in the via-first dual damascene integration scheme

Abstract: Articles you may be interested inReview of trench and via plasma etch issues for copper dual damascene in undoped and fluorine-doped silicate glass oxide Experimental characterization and modeling of the reliability of three-terminal dual-damascene Cu interconnect trees

Cited by 7 publications

References 0 publications

Low-k SiCxNyFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Low-k SiCxNyFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Profile Evolution Simulation of Oxide Fencing during Via-First Dual Damascene Etching Processes

Infrared interference patterns for new capabilities in laser end point detection

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Product

Resources

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Low-k SiC_xN_yFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor

Low-k SiC_xN_yFilms Prepared by Plasma-Enhanced Chemical Vapor Deposition Using 1,3,5-trimethyl-1,3,5-trivinylcyclotrisilazane Precursor