Understanding the Failure Mechanisms of Protection Diodes During System Level ESD: Toward Repetitive Stresses Robustness

Abstract

In electronic systems the ever-increasing level of integration is paced by component scaling. Consequently, system level protection improvements in electrostatic discharge (ESD) reliability during a device's lifetime is mandatory. To this end we have investigated bidirectional system level ESD protection diodes that have been subjected to repetitive HMM stresses. Our goal was to develop robust ESD components by understanding the physical and electrical behaviors of components after multiple ESD surges. In this paper, three ESD-induced failure modes of protection devices are demonstrated and analyzed in terms of severity: charge trapping in the silicon-oxide interface, metallic diffusion towards the contacts and melted filaments in the silicon bulk at the junction periphery.

Investigation on Statistical Tools to Analyze Repetitive-Electrostatic-Discharge Endurance of System-Level Protections

“…It has to be noticed that there is a good correlation of the ESD robustness between packaged devices tested with an IEC gun and with Barth 4702IEC-50 testers. We also observed excellent agreement between devices tested at wafer level and packaged ones using the Barth tester [3]. Nevertheless, it is worth underlining that any general and universal correlation law could be defined from these results.…”

“…For the process C, infant mortality is solved and no defect of metallization is observed in the devices. Also, it should be noticed that this initial defect is the origin of failure through an electro thermo migration phenomenon [3]. The Weibull distribution analysis reveals that process C is more reliable than process splits A or B.…”

Effects of Electrostatic Discharge Stress on Current-Voltage and Reverse Recovery Time of Fast Power Diode

“…In switching mode, FRDs act as a freewheeling device to protect the power semiconductors against high voltage spike damage, which is usually generated from inductance loads such as motor coils or relay windings suddenly turned "OFF". However, the FRD itself could not avoid degradation or failure due to high voltage spike, snappy recovery and electrostatic discharge (ESD) [1][2][3][4]. The p-n junction is the main structure of the FRDs, and is inevitable from the effects of ESD during the fabrication, testing, packaging and printing to board circuit process.…”

“…The ESD is known as a high transient current and voltage source with a short duration time less than 150 ns, which is originated from the transfer of electrostatic charges between two objects with different electrical potentials [5]. High transient voltages generated by the ESD can lead to the burn-out of the metal contact edge, surface, Si-SiO 2 interface, and p-n junction [2]. Typical damages are known as the defect states, which are the main sources of the leakage current [2,6] and noise [7] (trapping and de-trapping of carriers in defect states, especially, at the Si-SiO 2 interface).…”

Reverse Current Conduction Mechanism of Transient Voltage Suppression Diode under Electrostatic Discharge Stress

“…7) Typically, such damage introduces a defect state in the bulk device, which can become a main source of leakage current. 8,9) This can lead to jitter noise in digital and analog circuits, leading to poor reliability in the long term. 10,11) Despite this problem, there have been few reports on the effects of such large ESD events upon the carrier conduction mechanism of the TVS diode in the reverse bias regime.…”