Unified tunnelling-diffusion theory for Schottky and very thin MOS structures

Racko, J.; Valent, Peter; Benko, P.; Donoval, D.; Harmatha, L.; Pinteš, P.; Breza, Juraj

doi:10.1016/j.sse.2008.07.009

Cited by 11 publications

(6 citation statements)

References 15 publications

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“…The reduction of the leakage current densities for annealed structures is evident only for the gate voltage close to zero (from -0.3 V to +0.3 V) decreasing from sample A1 gradually to sample A7 [11]. The behavior of I-V curves corresponds to theoretical predictions for such structures [14] but except for the mentioned interval it is almost identical for both untreated and treated structures, although there were significant differences in C-V characteristics. The reason of such behavior could be caused by two kinds of interface states, at both SiO 2 /Si and HfO 2 /SiO 2 interfaces.…”

Section: Resultsmentioning

confidence: 53%

“…However, the leakage current represented by tunneling transport in the case of very thin oxide layers (< 10 nm) becomes a significant problem. The tunneling current for very thin oxide layers influences the division of the applied voltage U g between the semiconductor and insulator layer and for the oxide layer thickness < 2 nm the whole applied voltage practically spreads across the semiconductor, especially in the range of inversion [14]. Concerning the tunneling process the transport of free charge curriers through the thin oxide layer caused by applied electric field has to be taken into account where the tunneling current following the Fowler-Nordheim mechanism [15] induces additional change of the ARS…”

Section: Theoretical Principlesmentioning

confidence: 99%

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Investigation of Interface States in Si/NAOS-SiO2/HfO2 Structures Using Complete Acoustic Spectroscopy

Bury¹,

Matsumoto²,

Hardoň³

et al. 2014

Komunikácie

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The set of MOS structures formed on n-type Si substrate with (NAOS)-SiO 2 /HfO 2 gate dielectric layers was prepared and annealed in N 2 atmosphere at various temperatures to stabilize the structure and to decrease the interface states density. Two Acoustic DLTS techniques using both surface (SAW) and longitudinal (LAW) acoustic waves including acoustoelectric response signal versus gate voltage dependence (U ac -U g characteristics) were used to characterize the interface states and the role of annealing treatment. The main interface deep centers with activation energies about 0.30 and 0.20 eV, typical for dangling bonds were observed as well as a particular influence of annealing treatment on the interface states. The obtained results are analyzed, discussed and mutually compared.

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Section: Resultsmentioning

confidence: 53%

Section: Theoretical Principlesmentioning

confidence: 99%

Investigation of Interface States in Si/NAOS-SiO2/HfO2 Structures Using Complete Acoustic Spectroscopy

Bury¹,

Matsumoto²,

Hardoň³

et al. 2014

Komunikácie

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“…The tunneling current for the very thin oxide layer influences the division of the applied voltage U g between the semiconductor and insulator layer and for the oxide layer thickness <2 nm, the whole applied voltage practically spreads across the semiconductor, especially in the range of inversion. 24 Concerning the tunneling process, the transport of free charge carriers through the thin oxide layer caused by applied electric field has to be taken into account in cases where the tunneling current following with the Fowler-Nordheim mechanism 25 induces additional change of the ARS…”

Section: Theoretical Principlesmentioning

confidence: 99%

Investigation of interface states distribution in metal-oxide-semiconductor structures with very thin oxides by acoustic spectroscopy

Bury

Bellan

Kobayashi

et al. 2014

Journal of Applied Physics

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New technique of acoustic spectroscopy to study interface states in metal-oxide-semiconductor (MOS) structures with a very thin oxide layer based on the acoustoelectric effect resulting from the interaction between the longitudinal acoustic wave and semiconductor-insulator interface is presented. The essential principles and theoretical background of this acoustic spectroscopy technique that can determine the interface states distribution from the measured acoustoelectric response signal as a function of gate voltage (Uac-Ug characteristics) are described. The results obtained on the representative set of MOS structures prepared on both n- and p-type Si substrates by nitric acid oxidation of Si technology and undergone also some thermal treatment demonstrate that the introduced technique of acoustic spectroscopy can be a very useful tool for the interface states characterization.

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“…The tunnelling current for very thin oxide layers influences the division of the applied voltage U g between the semiconductor and the insulator layer and for the oxide layer thickness < 2 nm the whole applied voltage practically spreads across the semiconductor, especially in the range of inversion [8]. Concerning the tunnelling process the transport of free charge curriers through the thin oxide layer caused by electric field has to be taken into account where the tunnelling current can be expressed in the form ( )…”

Section: Figmentioning

confidence: 99%