Universal switch modules for FPGA design

Abstract

A switch module M with W terminals on each side is said to be universal if every set of nets satisfying the dimensional constraint (i.e., the number of nets on each side of M is at most W) is simultaneously routable through M. In this article, we present a class of universal switch modules. Each of our switch modules has 6W switches and switch-module flexibility three (i.e., F S ϭ 3). We prove that no switch module with less than 6W switches can be universal. We also compare our switch modules with those used in the Xilinx XC4000 family FPGAs and the antisymmetric switch modules (with F S ϭ 3) 1 suggested by Rose and Brown [1991]. Although these two kinds of switch modules also have F S ϭ 3 and 6W switches, we show that they are not universal. Based on combinatorial counting techniques, we show that each of our universal switch modules can accommodate up to 25% more routing instances, compared with the XC4000-type switch module of the same size. Experimental results demonstrate that our universal switch modules improve routability at the chip level. Finally, our work also provides a theoretical insight into the important observation by Rose and Brown [1991] (based on extensive experiments) that F S ϭ 3 is often sufficient to provide high routability.

On Optimum Designs of Universal Switch Blocks

“…We here consider the (k, W ) switch block ((k, W )-SB for short), in which terminals are grouped into k sides, each side has W terminals, and non-direct configurable switches connect pairs of terminals from different sides. The (4, W )-SBs are typical switch modules used in two dimensional FPGA architectures such as Xilinx XC4000-type FPGAs [3,4,10,12,13]. The routability and area efficiency are the foremost two issues in switch block designs.…”

“…To achieve high routing capacity, Chang et al [4] proposed the significant concept of universal switch modules. A (k, W )-SB is said to be universal (a (k, W )-USB) if it is routable for every set of nets satisfying the routing constraint, i.e., the number of nets on each side is at most W .…”

“…The first optimum (4, W )-USB was given in [4], called a symmetric switch module. It has 6W switches with F s = 3.…”

“…The routability of 2D-FPGA with USBs was tested in [4]. We further perform the experimental justification using VPR [1] with the commonly used disjoint switch block, the symmetric USB [4] and an alternative USB.…”

“…We further perform the experimental justification using VPR [1] with the commonly used disjoint switch block, the symmetric USB [4] and an alternative USB. The setting and results are presented in Section 4.…”