Unraveling the origins of the coexisting localized-interfacial mechanism in oxide-based memristors in CMOS-integrated synaptic device implementations

Koh, Eng Kang; Dananjaya, Putu Andhita; Poh, Han Yin; Liu, Lingli; Lee, Calvin Xiu Xian; Thong, Jia Rui; You, Young Seon; Lew, Wen Siang

doi:10.1039/d3nh00554b

Nanoscale Horiz.

2024

DOI: 10.1039/d3nh00554b

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Unraveling the origins of the coexisting localized-interfacial mechanism in oxide-based memristors in CMOS-integrated synaptic device implementations

Eng Kang Koh,

Putu Andhita Dananjaya,

Han Yin Poh

et al.

Abstract: This work introduces a scalable CMOS-integrated memristive device designed to demonstrate dual-mode functionality encompassing both localized (digital) and interfacial (analog) switching mechanisms.

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Leveraging Tunability of Localized-Interfacial Memristors for Efficient Handling of Complex Neural Networks

Koh,

Dananjaya,

Liu

et al. 2024

ACS Nano

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A scalable (<130 nm) resistive switching memristor that features both filamentary and interfacial switching aimed at neuromorphic computing is developed in this study. The typically perceived noise or volatility was effectively harnessed as a controlled mechanism for interfacial switching. The multilayer structure for the proposed memristor enhances switching stability by curbing ionic overmigration and mitigating leakage paths. Furthermore, the memristors showcased their reliability by demonstrating more than 15 M cycles in the filamentary mode and 1 M pulses in the interfacial mode. Additionally, retention tests at 85 °C for 10 4 s confirmed the stability across different states, affirming its reliability as a nonvolatile CMOS-compatible element. While many studies validate performance solely on the MNIST data set, this work also evaluates more complex data sets, demonstrating the robustness of the demonstrated memristor in supervised learning. Specifically, supervised learning simulations on MNIST and fashion MNIST data sets indicated a high learning rate with <4% deviations from numerical training, while offline inference trained on CIFAR-10 and CIFAR-100 data sets revealed <2.5% and <7% deviations caused by programing error accumulation, even with increased memristor counts for these highly complex data sets. Unsupervised learning via spike-timing-dependent plasticity further highlights the potential of the developed memristor in bridging artificial and biological paradigms, offering a significant advance toward efficient and biologically inspired computing architectures.

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Leveraging Tunability of Localized-Interfacial Memristors for Efficient Handling of Complex Neural Networks

Koh,

Dananjaya,

Liu

et al. 2024

ACS Nano

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show abstract

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Unraveling the origins of the coexisting localized-interfacial mechanism in oxide-based memristors in CMOS-integrated synaptic device implementations

Abstract: This work introduces a scalable CMOS-integrated memristive device designed to demonstrate dual-mode functionality encompassing both localized (digital) and interfacial (analog) switching mechanisms.

Cited by 1 publication

References 62 publications

Leveraging Tunability of Localized-Interfacial Memristors for Efficient Handling of Complex Neural Networks

Leveraging Tunability of Localized-Interfacial Memristors for Efficient Handling of Complex Neural Networks

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