Use of novel chemical dipping method for the stability evaluation of an ultrathin TaNx barrier in Cu interconnects

Abstract

When a dip test in buffered oxide etching chemicals is combined with narrow contact pattern, the test can be used as a simple barrier evaluation method, especially for predicting of IPVD (Ionized Physical Vapor Deposition) extendibility. In spite of the excellent coverage of IPVD TaN x films the structural defect at the corner of the pattern could be the root cause of device degradation. The use of extremely thin IPVD TaN x film of around 20 Å was limited by the contact of less than 0.2 µm and an AR (Aspect Ratio) value greater than 4:1.

Interfacial Adhesion Energy of Ru–AlO Thin Film Deposited by Atomic Layer Deposition between Cu and SiO2: Effect of the Composition of Ru–AlO Thin Film

“…[1][2][3][4][5] In ultralarge-scale Cu integration technology, barrier layers, such as Ta/TaN bilayers, have traditionally been used to inhibit Cu diffusion to the dielectric. 6) However, the contemporary barrier layers used with the current technology may be insufficient in future technology nodes, because the barrier layer needs to be thinned or removed to prevent the effective resistance of the interconnects from rapidly increasing as they are increasingly miniaturized to achieve higher performance. Ruthenium thin films have many current and potential applications.…”

Urea as a complexing agent for selective removal of Ta and Cu in sodium carbonate based alumina chemical–mechanical planarization slurry

“…A diffusion barrier layer made up of Ta or TaN is incorporated to hinder the Cu diffusion between Cu and adjacent Si-based material. 5 Currently, in the integrated circuits fabrication, Cu is employed for BEOL along with material having a lower value of dielectric constant such as Ta and nitrides of Ta. 6 In IC manufacturing industries, it is vital to maintain the polishing rate of Ta as well as Cu consistent.…”

Effects of Post-SiH4 and Plasma Treatments on Chemical Vapor Deposited Cu Seeds with Chemical Vapor Deposited TiN Barrier in Porous Low Dielectric Constant and Cu Integration

“…The need for high-performance interconnecting metal lines for next-generation ultralarge-scale integrated circuit technology has produced an enormous increase in research and development activity on low-k dielectrics and copper thin films as interconnect material. [1][2][3][4][5][6][7][8][9] Cu interconnection has been extensively developed and used below 0.10-m technology nodes to achieve highly conductive metals for wiring, as ultralow dielectric constant (k < 2:2) materials for intermetal dielectrics (IMD) to reduce resistance-capacitance delay (RC), and also to enhance electromigration (EM) resistance. 1,2) Using low-k materials for interconnections also reduces both power consumption and transistor crosstalk.…”

“…[1][2][3][4][5][6][7][8][9] Cu interconnection has been extensively developed and used below 0.10-m technology nodes to achieve highly conductive metals for wiring, as ultralow dielectric constant (k < 2:2) materials for intermetal dielectrics (IMD) to reduce resistance-capacitance delay (RC), and also to enhance electromigration (EM) resistance. 1,2) Using low-k materials for interconnections also reduces both power consumption and transistor crosstalk. 1) Based on fluorinated silica glass (FSG) with a dielectric constant (k) of about 3.7, Cu interconnects have been evaluated in logic devices at a 0.13-m technology node.…”

“…Despite thermal degradation in Cu/organosilicate glass (OSG) interconnections, Cu interconnections with a low dielectric constant (below 2.9) have been developed in 65-nm technology node devices because organosilicate glass has good resistance to oxidation and a low dielectric constant. 2,[7][8][9][10][11] As significant potential solutions, chemical vapor deposition (CVD) low k (dielectric constant), and spin-on dielectric (SOD) materials have been developed in Cu-low k interconnections with k < 2:5. [12][13][14] To achieve k values below $2:2, open volumes, or ''pores'', are introduced into the dielectric.…”