2010 IEEE International 3D Systems Integration Conference (3DIC) 2010
DOI: 10.1109/3dic.2010.5751473
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Use of optical metrology for wafer level packaging of CMOS image sensor

Abstract: For WLP and 3D integration, wafers are processed through several steps which generally include bounding and thinning processes. Those processes are generally realized by the use of carriers typically glass or Silicon substrates. In this paper, we present results about thickness measurements using optical techniques namely Infra-Red interferometer and white-light spectrometer on various stacked structures. These non contact optical techniques are demonstrated to be helpful methods for the in-line monitoring.

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“…For the case of multistacked structures, the resulting diagram will present several peaks corresponding to each interface. The thickness of the individual layers can be calculated from the distance between the two peaks divided by the layer's material refractive index [5].…”
Section: Optical Metrology Techniquesmentioning
confidence: 99%
“…For the case of multistacked structures, the resulting diagram will present several peaks corresponding to each interface. The thickness of the individual layers can be calculated from the distance between the two peaks divided by the layer's material refractive index [5].…”
Section: Optical Metrology Techniquesmentioning
confidence: 99%