Using hardware-software codesign language to implement CANSCID

Abstract

The paper describes our solution of this year hwsw codesign problem with our codesign language (HaSCoL).

Good technology makes the difficult task easy

“…Our team has many years of experience on development a tool for design hardware implementations of complex applications on the basis of language HaSCoL (Hardware and Software CoDesign Language) [4, 5,6,7,8]. This language is a convenient tool for the programmer to explicitly specify parallelism -a few steps one can write with a separator «|», thus the compiler is instructed that they must be carried out in parallel in a single cycle, and a means of specifying pipeline -a few steps separated by ";" set the conveyer, the system provides the auxiliary registers storing intermediate results, synchronization, the interaction of pipelines, their suspension and resumption.…”

Accelerating multiple alignment on FPGA with a high-level hardware description language

“…In this section we describe our implementation of the algorithm described above in the HaSCoL high-level hardware description language [2] [7]. We judge how well the language suits implementing different parts of the design based on the quantity of efforts needed to code and test those parts as well as the place-and-route results.…”

“…To break a data path into several cycles one may use a semicolon inside a message handler, which describes a pipeline (with backpressure propagated if needed). For more information about the language see a HaSCoL tutorial (http://code.google.com/p/hascolplayground/wiki/MiniTutoria l) and [2] [7].…”