Using PRAM Algorithms on a Uniform-Memory-Access Shared-Memory Architecture

Abstract

The ability to provide uniform shared-memory access to a significant number of processors in a single SMP node brings us much closer to the ideal PRAM parallel computer. In this paper, we develop new techniques for designing a uniform shared-memory algorithm from a PRAM algorithm and present the results of an extensive experimental study demonstrating that the resulting programs scale nearly linearly across a significant range of processors (from 1 to 64) and across the entire range of instance sizes tested. This linear speedup with the number of processors is, to our knowledge, the first ever attained in practice for intricate combinatorial problems. The example we present in detail here is a graph decomposition algorithm that also requires the computation of a spanning tree; this problem is not only of interest in its own right, but is representative of a large class of irregular combinatorial problems that have simple and efficient sequential implementations and fast PRAM algorithms, but have no known efficient parallel implementations. Our results thus offer promise for bridging the gap between the theory and practice of shared-memory parallel algorithms.

Designing irregular parallel algorithms with mutual exclusion and lock-free protocols

“…Fast parallel algorithms for irregular problems have been developed for such systems. For instance, we have designed fast parallel graph algorithms and demonstrated speedups compared with the best sequential implementation for problems such as ear decomposition [9], tree contraction and expression evaluation [10], spanning tree [6,8], rooted spanning tree [20], and minimum spanning forest [7]. Many of these algorithms achieve good speedups due to algorithmic techniques for efficient design and better cache performance.…”

A Parallel State Assignment Algorithm for Finite State Machines

“…SMP clusters are now ubiquitous for high-performance computer, consisting of clusters of multiprocessors nodes (e.g., IBM Regatta, Sun Fire, HP AlphaServer, and SGI Origin) interconnected with high-speed networks (e.g., vendor-supplied, or third party such as Myricom, Quadrics, and InfiniBand). Current research has shown that it is possible to design algorithms for irregular and discrete computations [1][2][3][4] that provide efficient and scalable performance on SMPs.…”

On the Architectural Requirements for Efficient Execution of Graph Algorithms

“…To analyze SMP performance, we use a complexity model similar to that of Helman and JáJá [20] which has been shown to provide a good cost model for sharedmemory algorithms on current symmetric multiprocessors [19,20,2,3]. The model uses two parameters: the problem's input size n, and the number p of processors.…”

“…Helman and JáJá [19,20] present an ef-ficient list ranking algorithm with implementation on SMP servers that achieves significant parallel speedup. Using this implementation of list ranking, Bader et al have designed fast parallel algorithms and demonstrated speedups compared with the best sequential implementation for graphtheoretic problems such as ear decomposition [2], tree contraction and expression evaluation [3], spanning tree [4], rooted spanning tree [13], and minimum spanning forest [5]. Many of these algorithms achieve good speedups due to algorithmic techniques for efficient design and better cache performance.…”