1995
DOI: 10.1016/0168-9002(94)01247-4
|View full text |Cite
|
Sign up to set email alerts
|

Using software and hardware neural networks in a Higgs search

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

1995
1995
2017
2017

Publication Types

Select...
6
1

Relationship

0
7

Authors

Journals

citations
Cited by 8 publications
(2 citation statements)
references
References 10 publications
0
2
0
Order By: Relevance
“…Since the very beginning of the neural network field, analog implementations have accompanied theoretical developments sometimes with amazingly short delays. Analog chips implementing neural networks have been also shown to be very effective in many practical applications such as intelligent control, 42,43 nuclear physics, [12][13][14]39,124 optical character recognition, 106 tracking and target recognition (the Irvine Sensors-JPL chip mentioned in Sec. 2.2), etc.…”
Section: Discussionmentioning
confidence: 99%
“…Since the very beginning of the neural network field, analog implementations have accompanied theoretical developments sometimes with amazingly short delays. Analog chips implementing neural networks have been also shown to be very effective in many practical applications such as intelligent control, 42,43 nuclear physics, [12][13][14]39,124 optical character recognition, 106 tracking and target recognition (the Irvine Sensors-JPL chip mentioned in Sec. 2.2), etc.…”
Section: Discussionmentioning
confidence: 99%
“…Other gradient descent-based optimization methods have also been implemented on neuromorphic systems for training, and they tend to be variations of back-propagation that have been adapted or simplified in some way [639], [645], [709], [716], [718], [719], [723], [792], [812], [844], [1030], [1122], [1300]- [1303]. Back-propagation methods have also been developed in chip-in-the-loop training methods [686], [702], [732], [815], [859]; in this case, most of the learning takes place on a host machine or off-chip, but the evaluation of the solution network is done on the chip. These methods can help to take into account some of the device's characteristics, such as component variation.…”
Section: A Supervised Learningmentioning
confidence: 99%