USJ formation &amp; characterization for 65nm node and beyond

Borland, John

doi:10.1109/iwjt.2004.1306746

Cited by 3 publications

(7 citation statements)

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“…13 with high >25% Ge surface level shown in the Ge-SIMS of Fig. 14 (18). Using LPEC rather than SPEC annealing no residual implant damage or EOR defects remained when the laser melt depth exceeded the a-Ge depth of 60nm as shown by the X-TEM in Fig.…”

Section: Strain-channel Formation By Ion Implantationmentioning

confidence: 92%

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High Electron and Hole Mobility by Localized Tensile & Compressive Strain Formation Using Ion Implantation and Advanced Annealing of Group IV Materials (Si+C, Si+Ge & Ge+Sn)

Borland¹

2016

ECS Trans.

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This paper will review strain-Si and strain-Ge formation by ion implantation and advanced annealing to form localized tensile and compressive strain channel for improved electron and hole mobility in Group IV materials. Carbon implant was used to reduce the surface Si lattice constant forming Si+C material for localized compressive strain-Si channel. Ge implant was used to increase the surface Si lattice constant forming Si+Ge material for localized tensile strain-Si channel and Sn implant to increase the surface Ge lattice constant forming Ge+Sn material for localized tensile strain-Ge channel. Use of ion implant and advanced annealing for strain formation resulted in tensile strain-Si+Ge improving hole mobility by 4x and electron mobility by 1.5x while tensile strain-Ge+Sn improved electron mobility by 2-2.5x.

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Section: Strain-channel Formation By Ion Implantationmentioning

confidence: 92%

“…The traditional method to form high mobility GeSn channel material is again by CVD epitaxial deposition with the high TDD and therefore poor junction leakage. At IWJT-2015 Borland et al reported on an alternative method using amorphous Sn (a-Sn) ion implantation followed by LPEC nsec annealing (20). From the lattice constant data in Fig.…”

Section: Gesn Formationmentioning

confidence: 99%

High Electron and Hole Mobility by Localized Tensile & Compressive Strain Formation Using Ion Implantation and Advanced Annealing of Group IV Materials (Si+C, Si+Ge & Ge+Sn)

Borland¹

2016

ECS Trans.

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“…Oxide sidewall induced defects can also degrade junction leakage and device performance requiring a mesa etch defined Fin structure for lowest junction leakage. Ion implantation has extremely tight uniformity of 0.2-0.5% and uses photoresist masking method so an alternative to Ge-epi by CVD is to use either SPC or LPC to form high quality single crystal Ge or SiGe epitaxial surface layers from an amorphous 50-100% Ge deposited layer formed by DCD using the Si substrate wafer as a seed layer for single crystal epitaxial regrowth (36,37). SPC annealing technique is commonly used with ion implantation when the implant dose is high enough to cause sufficient surface damage to amorphize it.…”

Section: /10nm High Mobility Bulk or Soi Finfet Channelsmentioning

confidence: 99%

(Invited) Smartphones: Driving Technology to More than Moore 3-D Stacked Devices/Chips and More Moore FinFET 3-D Doping with High Mobility Channel Materials from 20/22nm Production to 5/7nm Exploratory Research

Borland

2015

ECS Trans.

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3-D bulk-FinFET at 22nm node uses (551) 8o tapered Fin sidewall with 45o high tilt implantation for doping, eSiGe S/D for PMOS channel compressive strain and amorphous implant SPC (solid phase crystallization) dislocation defects for NMOS channel tensile strain. For 14nm node taller Fins with vertical sidewalls and partial recess embedded n+ S/D was added. 7/10nm node will use direct high mobility channel materials 50% SiGe to 100% Ge. To avoid CVD Ge or SiGe epi defects liquid phase crystallization (LPC) by laser melt annealing is an alternative using amorphous-Ge dose control deposition by ion implantation and at 5nm node gate-all-around (GAA) nano-wire. Residual implant damage into Ge material creates high level of acceptors up to 7E19/cm3 requiring high temperature annealing above 600oC to annihilate and establish stable p+ or n+ dopant activation for ultra-shallow junctions. For USJ n+ junctions in Ge, melt controlled junction depth using Sb dopant results in highest dopant activation >1E21/cm3 at sub-10nm junction depth. Si-capping layer offers lowest n+ Ge junction leakage and Sn co-implantation enables surface strain-Ge engineering for higher channel mobility.

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“…It is still to be extended to the annealing of B cluster implantation. FLA technology can significantly suppress the enhanced diffusion of B in annealing [2]. On the other hand, the activation ratio of B after FLA is lower than rapid thermal annealing.…”

Section: Introductionmentioning

confidence: 99%

“…Boron cluster ion implantation is a potential technology for shallow junction formation in integrated circuits manufacture [1] [2]. With the technology becoming more practicable, capability of accurately simulating it for shallow junction formation becomes necessary.…”

Section: Introductionmentioning

confidence: 99%

Simulation on Advanced Shallow Junction Technology with Atomistic Method

Sui

et al. 2006

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings

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New technologies such as cluster or molecular ion implantation and flash lamp annealing (FLA) seem to be applied as advanced shallow junction technologies. In this paper, the Molecular Dynamics (MD) model based simulation on BB 10 H 14 and B 18 H 22 implantation is performed. The spike annealing of cluster implantation is simulated by atomistic model. The inactivation and clustering of B implanted at 0.5keV and annealed at 900 C~1200 C are correctly simulated by atomistic model. The simulation on activation ratio of B in FLA is presented. The discussion on cluster evolution in annealing is performed. o o 1. Introduction Boron cluster ion implantation is a potential technology for shallow junction formation in integrated circuits manufacture [1][2]. With the technology becoming more practicable, capability of accurately simulating it for shallow junction formation becomes necessary. As far as we know, by the full MD method, it is still difficult to simulate the implantation at high dose, e.g. 10 15 B/cm 2 , because of the limitation of computation capability. Kinetic Monte Carlo (KMC) method simulation has been successfully applied in the simulation of annealing of B monomer implantation. It is still to be extended to the annealing of B cluster implantation. FLA technology can significantly suppress the enhanced diffusion of B in annealing [2]. On the other hand, the activation ratio of B after FLA is lower than rapid thermal annealing. The simulation on annealing should capture this character. In this paper, the localized MD method [3] is applied to simulate boron cluster implantation. Attractive interaction within B cluster is considered. The simulated concentration profiles of B and H agree with SIMS data. The difference of B monomer and cluster implantation can be reproduced well. It is demonstrated that the KMC method can be extended to the simulation on annealing of B cluster implantation. The activation of B implanted at 0.5keV and annealed at 900 o C~1200 o C as well as FLA can be simulated by KMC model.

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USJ formation & characterization for 65nm node and beyond

Cited by 3 publications

References 0 publications

High Electron and Hole Mobility by Localized Tensile & Compressive Strain Formation Using Ion Implantation and Advanced Annealing of Group IV Materials (Si+C, Si+Ge & Ge+Sn)

High Electron and Hole Mobility by Localized Tensile & Compressive Strain Formation Using Ion Implantation and Advanced Annealing of Group IV Materials (Si+C, Si+Ge & Ge+Sn)

(Invited) Smartphones: Driving Technology to More than Moore 3-D Stacked Devices/Chips and More Moore FinFET 3-D Doping with High Mobility Channel Materials from 20/22nm Production to 5/7nm Exploratory Research

Simulation on Advanced Shallow Junction Technology with Atomistic Method

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