Neuro-inspired deep learning algorithms have shown promising futures in artificial intelligence. Despite the remarkable progress in software-based neural networks, the traditional von-Neumann hardware architecture has suffered from limited energy efficiency while facing unprecedented large amounts of data. To meet the performance requirements of neuro-inspired computing, large-scale vector-matrix multiplication is preferred to be performed in situ, namely compute-in-memory. Non-volatile memory devices with different materials have been proposed for weight storage as synaptic devices. Among them, HfO 2 -based ferroelectric devices have attracted great attention because of their low energy consumption, good complementarymetal-oxide-semiconductor (CMOS) compatibility and multi-bit per cell potential. In this review, recent trends and prospects of the ferroelectric synaptic devices are surveyed. First, we present the three-terminal synaptic devices based on the ferroelectric field effect transistor (FeFET), and discuss the switching physics of the intermediate states, the back-end-of-line integration and the 3D NAND architecture design. Then, we introduce a hybrid precision synapse concept that leverages the volatile charges on the gate capacitor of the FeFET and the non-volatile polarization on the gate dielectric of the FeFET. Lastly, we review two-terminal synaptic devices using the ferroelectric tunnel junction (FTJ) and ferroelectric capacitor (FeCAP). The design margins of the crossbar array with FTJ and FeCAP analyzed.