Value locality and load value prediction

Abstract

Since the introduction of virtual memory demand-paging and cache memories, computer systems have been exploiting spatial and temporal locality to reduce the average latency of a memory reference. In this paper, we introduce the notion of value locality, a third facet of locality that is frequently present in real-world programs, and describe how to effectively capture and exploit it in order to perform load value prediction. Temporal and spatial locality are attributes of storage locations, and describe the future likelihood of references to those locations or their close neighbors. In a similar vein, value locality describes the likelihood of the recurrence of a previously-seen value within a storage location. Modern processors already exploit value locality in a very restricted sense through the use of control speculation (i.e. branch prediction), which seeks to predict the future value of a single condition bit based on previously-seen values. Our work extends this to predict entire 32-and 64-bit register values based on previously-seen values. We find that, just as condition bits are fairly predictable on a per-static-branch basis, full register values being loaded from memory are frequently predictable as well. Furthermore, we show that simple microarchitectural enhancements to two modern microprocessor implementations (based on the PowerPC 620 and Alpha 21164) that enable load value prediction can effectively exploit value locality to collapse true dependencies, reduce average memory latency and bandwidth requirements, and provide measurable performance gains.

Widening the Memory Bottleneck by Automatically-Compiled Application-Specific Speculation Mechanisms

“…Load value speculation is a well-studied, but rarely used technique to reduce the impact of the memory bottleneck [19]. Mock et al were able to prove by means of a modified C compiler, which forced data speculation on an Intel Itanium 2 CPU architecture where possible, that performance increases due to load value speculation [22] of up to 10% were achievable.…”

OLSRp: Predicting Control Information to Achieve Scalability in OLSR Ad Hoc Networks

“…For instance, branch prediction [14] tries to reduce pipeline stalls by predicting the outcome of conditional branches, and value prediction [10] attempts to alleviate the serialization resulting from data dependences by predicting the results of arithmetic operations. Notice that prediction introduces additional complexity to the microprocessor because special hardware has to be devoted to predicting and then mandatorily validating the predictions.…”

A Theory of Speculative Computation

“…p), or the status of the lock in the case of a locking construct (with do e), is "guessed", or "predicted" -as regards loads from the memory, this is known as value prediction, and was introduced in [11,19]. These guessed values may be written by other threads, which are ignored at this stage.…”

“…We adopt and extend the approach presented in [7], that is, we define, using a pretty standard operational style, the speculative semantics of an expressive language, namely a call-by-value λ-calculus with mutable state and threads. Our formalization relies on extending the usual notion of an evaluation context [9], and using value prediction [11,19] as regards the values read from the memory. By introducing speculation contexts, we are able to formalize out of order executions, as in relaxed memory models, and also branch prediction [26], allowing to compute in the alternatives of a conditional branching construct.…”