Variable Ratio Sample Rate Conversion Based on Fractional Delay Filter

Abstract

In this paper a sample rate conversion algorithm which allows for continuously changing resampling ratio has been presented. The proposed implementation is based on a variable fractional delay filter which is implemented by means of a Farrow structure. Coefficients of this structure are computed on the basis of fractional delay filters which are designed using the offset window method. The proposed approach allows us to freely change the instantaneous resampling ratio during processing. Using such an algorithm we can simulate recording of audio on magnetic tape with nonuniform velocity as well as remove such distortions. We have demonstrated capabilities of the proposed approach based on the example of speech signal processing with a resampling ratio which was computed on the basis of estimated fundamental frequency of voiced speech segments.

An Architecture for Real-Time Arbitrary and Variable Sampling Rate Conversion With Application to the Processing of Harmonic Signals

“…Architectures and optimizations in the literature are in general abstracted from the hardware which will be used for implementation [15]- [18], focusing on the properties of the resampling filters [19]- [22]. There are digital architectures with arbitrary resampling ratios which can be either synchronous [23]- [24], or asynchronous [25]- [27] depending on the implementation. Resampling algorithms and solutions are usually classified according to the desired conversion ratio R. Integer ratios are well suited for implementation with Cascaded Comb filters or Cascaded Integrator Comb (CIC) architectures which exploit factorization of the transfer function.…”

“…For static resampling ratios, it is a periodic sequence, making the implementation easy with a Numerically Controlled Oscillator (NCO) [16], [37]. In [25] a solution for a variable rate is presented, but it is not valid for us as it does not address a decoupled data-path (where data propagates in the hardware based on the input sampling rate; this concept is presented in section V). The solution presented in [36] uses such a data-path, but in addition to the processing clock it requires an external signal driving the output rate.…”

A Sampling Rate Selecting Algorithm for the Arbitrary Waveform Generator

“…Conversion (FSRC), requiring a fractional conversion rate, which makes it challenging to design filters when the numerator and denominator of the fraction are large ( [15], [16]). The second is Arbitrary Sample Rate Conversion (ASRC), implemented by combining variable fractional delay components and FSRC with smaller numerator and denominator ( [17], [18]). Although ASRC overcomes the drawbacks of FSRC on computational cost and design complexity [19], it relies on estimating the value of fraction delay points and involves a new component, which introduces error and computational cost.…”

“…As the relationship between the original and new sample rate is arbitrary, the conversion may always proceed via the ASRC algorithm. However, due to the computational complexity of the ASRC, plentiful work emphasizes how to optimize its implementation ( [17], [22], [23]). To select a sampling rate with lower computational cost and better frequency stability, an algorithm is proposed in this paper based on the variable nature of the AWG's sampling rate supported by a variable clock generator, as [24] does.…”

“…As the relationship between the original and new sample rate is arbitrary, so that the conversion is always proceed by ASRC algorithm. However according to the computational complexity of the ASRC, there are still lots of works emphasis on how to optimize its implementation [17], [22], [23].…”