Vector potential equivalent circuit based on PEEC inversion

Abstract

Abstract-The geometry-integration based vector potential equivalent circuit (VPEC) was introduced to obtain a localized circuit model for inductive interconnects in [1]. In this paper, we show that the method in [1] is accurate only for the two-body problem. We derive N-body VPEC models based on geometry integration and inversion of inductance matrix under the PEEC model, respectively. Both VPEC models are derived from first principles and are accurate compared to the full PEEC model. The resulting circuit matrix ¡ can be analyzed directly by existing simulation tools such as SPICE, and the simulation time of VPEC model issmaller than that for PEEC model for a bus structure with 256 wire segments. It is also passive and strictly diagonal dominant, which leads to efficient circuit sparsification methods such as numerical and geometry based sparsifications. Compared to the full PEEC model, the sparsified VPEC models are orders of magnitude faster and produce waveforms with very small error.

Wideband passive multiport model order reduction and realization of RLCM circuits

“…However, directly handling mutual inductance in a dense MNA formulation as in [3] will be computationally expensive. As shown in [44], the sparsified VPEC model actually not only achieves the runtime speedup but also has the high accuracy compared to the original full model. Therefore, we use1 the VPEC model to represent inductance in our circuit reduction flow, as it enables passive presparsification [27], [44].…”

“…The significant difference between VPEC and nodal susceptance models for mutual inductance is that VPEC is a physically equivalent model and can exactly represent the original system [44]. As shown in Fig.…”

“…As shown in [44], although the VPEC model introduces more circuit elements, it has faster runtime because this model dramatically reduces reactive elements (i.e., inductors), leads to less numerical derivatives and integrals, and makes the simulation converge faster. To further improve the sparsified VPEC model extraction without full inversion as in [44], we extend a windowing technique [5]. It reduces the computation complexity to [O(Nb 3 )], where b is the size of the window (i.e., the size of the submatrix).…”

“…It is our ultimate goal to obtain compact models directly from a complex interconnect geometry without measurement or full-wave simulations. The new modeling method is based on the general s-domain hierarchical model reduction algorithm [39], [41] and an improved vector potential equivalent circuit (VPEC) [44] model for self and mutual inductance, which can be easily sparsified and are hierarchical reduction friendly.…”

5 Complexity reduction of electromagnetic systems

“…This approach, however, does not guarantee the positive definiteness of the resulting inductance matrix and therefore the model passivity is not preserved. A series of alternative methods for robust sparsification of the inductance matrix which preserve the passivity were proposed, such as the K-method [34], the vector potential equivalent circuit method [54], and the magnetoelectric equivalent circuit method [29].…”