Versatile MLCP estimator low-power fixed-width booth multiplier

Prasad, G. Durga; Babulu, K.

doi:10.1109/scopes.2016.7955528

2016 International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES) 2016

DOI: 10.1109/scopes.2016.7955528

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Versatile MLCP estimator low-power fixed-width booth multiplier

G. Durga Prasad

K. Babulu

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2020

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An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier for Signal Processing Applications

Radhakrishnan

Karn

Nirmalraj

2020

J CIRCUIT SYST COMP

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In digital signal processing (DSP), the most valuable elements of processing architecture are multiplier. The conventional partial products array is to create extra rows and columns. Generally, the fixed multiplication products are truncated to [Formula: see text] bits. In this paper, we introduced an adaptive booth multiplier concept, which is based on truncated multiplication procedure. The extra partial product array is to create the complexities. In the higher order of partial product array, the deletion of LSB and the nongeneration of initial products are achieved. We added compensation bits at the appropriate retained bit position to minimize the error due to nongeneration and omission. Here, our proposed work is used to reduce the overhead and the complexity of partial product array. The proposed concept architecture is implemented in Verilog HDL software; also the design of RTL is manufactured. For experimental work, the bit multiplication of [Formula: see text] with 8, 10, 12, 14 and 16 bits is used. The proposed method of truncated based adaptive booth encoding has shown the lower value results of area, delay and power consumption. The error performances are executed by various error normalizations. Finally, the proposed concept performance is checked with various state-of-art multiplier methodologies such as carry width multiplier, Vedic multiplier, voltage-mode multiplier and Wallace multiplier. In every bit value, the proposed booth encoding multiplier delivers better and optimal performance result.

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An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier for Signal Processing Applications

Radhakrishnan

Karn

Nirmalraj

2020

J CIRCUIT SYST COMP

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Versatile MLCP estimator low-power fixed-width booth multiplier

Cited by 1 publication

References 13 publications

An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier for Signal Processing Applications

An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier for Signal Processing Applications

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