VForce: An environment for portable applications on high performance systems with accelerators

Moore, Nicholas; Leeser, Miriam; King, Laurie Smith

doi:10.1016/j.jpdc.2011.07.014

Cited by 7 publications

(6 citation statements)

References 9 publications

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“…Some projects such as TMD-MPI [18], VFORCE/ VSIPL++ [19], and GASNet/GAScore [20] target only the hardware software interface. These tools provide message passing capabilities, but rely on purely operational semantics to describe the HW/SW interface.…”

Section: Related Workmentioning

confidence: 99%

Software-Driven Hardware Development

King

Hicks

Ankcorn

2015

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

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The cost and complexity of hardware-centric systems can often be reduced by using software to perform tasks which don't appear on the critical path. Alternately, the performance of software can sometimes be improved by using special purpose hardware to implement tasks which do appear on the critical path. Whatever the motivation, most modern systems are composed of both hardware and software components.Given the importance of the connection between hardware and software in these systems, it is surprising how little automated and machine-checkable support there is for co-design space exploration. This paper presents the Connectal framework, which enables the development of hardware accelerators for software applications by generating hardware/software interface implementations from abstract Interface Design Language (IDL) specifications.Connectal generates stubs to support asynchronous remote method invocation from software to software, hardware to software, software to hardware, and hardware to hardware. For high-bandwidth communication, the Connectal framework provides comprehensive support for shared memory between hardware and software components, removing the repetitive work of processor bus interfacing from project tasks.This framework is released as open software under an MIT license, making it available for use in any projects.

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Section: Related Workmentioning

confidence: 99%

Software-Driven Hardware Development

King

Hicks

Ankcorn

2015

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

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“…VForce [26] provides performance portability in a transparent way across different kinds of accelerators to programs written in the VSIPL++ (Vector Signal Image Processing Library extension), a domain-specific language focused on image and signal processing. OCLoptimizer is not domain-specific as it targets any kind of application.…”

Section: Related Workmentioning

confidence: 99%

Automatic Generation of Optimized OpenCL Codes Using OCLoptimizer

Fabeiro

Andrade

Fraguela

et al. 2015

The Computer Journal

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The eruption of multicore processors and several kinds of accelerators has generalized the interest in parallel programming. The OpenCL standard is very appealing because it provides code portability across most of these platforms. It defines a programming model where a host code requests the execution of kernels in computational devices. Unfortunately, the host API of OpenCL is quite verbose, which makes the development of its host code tedious and errorprone. More importantly, OpenCL does not provide automatic performance portability. As a result, users have to hand-tune OpenCL codes for each specific device, which implies trying different versions of the kernels and task partition granularities. As an answer to this situation we present OCLoptimizer, a tool that automatically generates host codes and optimizes OpenCL kernels for each specific target device based on a user provided configuration file. This configuration file describes basic kernel characteristics and annotations in the kernels that indicate the code transformations to test. Our tool can explore different granularities for the problem decomposition as well as different alternatives for the kernel. This exploration is performed by means of an iterative optimization process whose parameters and search strategy are defined by the user specifications. Support for OpenCL codes composed of multiple kernels is also provided by the tool. Experiments performed on multicore CPUs and different accelerators show that the tool is very effective, generating codes with an average speedup of 2.54 with respect to baseline hand-tuned implementations, in single kernel codes, and 1.79 in a code with multiple kernels.

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“…1a. Such sorters are very valuable for different priority buffers/queues [24]; • Using the results of [19] permitting the same application code to be run in software or in application-specific hardware (FPGA in our case).…”

Section: Related Workmentioning

confidence: 99%

“…A number of comparisons (FPGA vs. multicore CPU, FPGA vs. GPU, FPGA vs. DSP) can be found in [3], [7], [16]- [18]. Existing extendable middleware frameworks, such as VForce [19], permit the same application code to be run in software or in application-specific hardware supporting calls to both FPGAs and GPUs and requiring no changes in user code (results on systems with NVIDIA Tesla GPUs and Xilinx FPGAs are presented in [19]). Thus, application-specific designs can be linked with generalpurpose systems.…”

Section: Introductionmentioning

confidence: 99%

FPGA-based Accelerators for Parallel Data Sort

Sklyarov

Skliarova

Sudnitson

2014

Applied Computer Systems

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The paper is dedicated to parallel data sort based on sorting networks. The proposed methods and circuits have the following characteristics: 1) using two-level parallel comparators in even-odd transition networks with feedback to a register keeping input/intermediate data; 2) parallel merging of many sorted sequences; 3) using even-odd transition networks built from other sorting networks; 4) rational reuse of comparators in different types of networks, namely even-odd transition and for discovering maximum/minimum values. The experiments in FPGA, which were done for up to 16×220 32-bit data items, demonstrate very good results (as fast as 3-5 ns per data item).

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VForce: An environment for portable applications on high performance systems with accelerators

Cited by 7 publications

References 9 publications

Software-Driven Hardware Development

Software-Driven Hardware Development

Automatic Generation of Optimized OpenCL Codes Using OCLoptimizer

FPGA-based Accelerators for Parallel Data Sort

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