2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2018
DOI: 10.1109/patmos.2018.8464140
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VHDL-Based Modelling Approach for the Digital Simulation of 4-Phase Adiabatic Logic Design

Abstract: In comparison to conventional CMOS (nonadiabatic logic), the verification of the functionality and the low energy traits of adiabatic logic techniques are generally performed using transient simulations at the transistor level. However, as the size and complexity of the adiabatic system increases, the amount of time required to design and simulate also increases. Moreover, due to the complexity of synchronizing the power-clock phases, debugging of errors becomes difficult too thus, increasing the overall verif… Show more

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Cited by 4 publications
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“…The work reported in this paper builds on the work done in the author's previous publications [9], [10].…”
Section: A Contributions Of This Papermentioning
confidence: 88%
“…The work reported in this paper builds on the work done in the author's previous publications [9], [10].…”
Section: A Contributions Of This Papermentioning
confidence: 88%