Via optimization for next generation speeds

Chen, Siang; Chen, Carol; Liao, Chun-Lin; Chen, James; Wu, Tzong‐Lin; Mutnury, Bhyrav

doi:10.1109/epeps.2017.8329730

Cited by 13 publications

(4 citation statements)

References 5 publications

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“…Various studies to improve digital transmission speed have been conducted by optimizing via parameters such as the via diameter, via gap, via pad diameter, and ground aperture diameter to control the impedance discontinuity in the via structures [9,10], and by minimizing signal reflection and radiation through adding ground vias or adopting various ground via patterns [11][12][13]. Research has also focused on a new DL-based via structure with a flat-faced design as an alternative to optimizing the cylindrical via structures in DLs [14].…”

Section: Introductionmentioning

confidence: 99%

“…Despite these research efforts to minimize reflection and maintain signal integrity in the via structures, whenever the structure of the digital circuit changes, complex via structures with numerous parameters should be redesigned and re-optimized using a sophisticated design process. The performance of a single DL-based via structure could be enhanced through optimization of the ground structure with more ground vias (e.g., 2~6) [11,13], but this required significantly more space on the circuit boards. In addition, this configuration may significantly complicate the design process for multiple closely spaced vertical transitions to achieve similar high performances within the limited space of digital circuit boards.…”

Section: Introductionmentioning

confidence: 99%

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Ultra-Wideband Vertical Transition in Coplanar Stripline for Ultra-High-Speed Digital Interfaces

Kim,

Lee,

Min

et al. 2024

Sensors

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A design method for an ultra-wideband coplanar-stripline-based vertical transition that can be used for ultra-high-speed digital interfaces is proposed. A conventional via structure, based on a differential line (DL), inherently possesses performance limitations (<10 GHz) due to difficulties in maintaining constant line impedance and smooth electric field transformation, in addition to the effects of signal skews, FR4 fiber weave, and unbalanced EM interferences. DL-based digital interfaces may not meet the demands of ultra-high-speed digital data transmission required for the upcoming 6G communications. The use of a coplanar stripline (CPS), a type of planar balanced line (BL), for the vertical transition, along with the ultra-wideband DL-to-CPS transition, mostly removes the inherent and unfavorable issues of the DL and enables ultra-high-speed digital data transmission. The design process of the transition is simplified using the analytical design formulas, derived using the conformal mapping method, of the transition. The characteristic line impedances of the transition are calculated and found to be in close agreement with the results obtained from EM simulations. Utilizing these results, the CPS-based vertical transition, maintaining the characteristic line impedance of 100 Ω, is designed and fabricated. The measured results confirm its ultra-wideband characteristics, with a maximum of 1.6 dB insertion loss and more than 10 dB return loss in the frequency range of DC to 30 GHz. Therefore, the proposed CPS-based vertical transition offers a significantly wider frequency bandwidth, i.e., more than three times that of conventional DL-based via structures.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Ultra-Wideband Vertical Transition in Coplanar Stripline for Ultra-High-Speed Digital Interfaces

Kim,

Lee,

Min

et al. 2024

Sensors

View full text Add to dashboard Cite

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“…Since the mixed-mode and single-ended scattering parameters are both linear representations, it is possible to use them as a reference during the number and position evaluation of stitching VIAs. The insertion of stitching VIAs can be used to improve the performance in terms of modal conversion and insertion loss once the structure of the differential couple has been optimized [12,15,16]. The cited papers evidence the need for asymmetrical VIA organization, as any asymmetry increases the modal-conversion contributions [16,17].…”

Section: Introduction and State-of-the Artmentioning

confidence: 99%

“…The cited papers evidence the need for asymmetrical VIA organization, as any asymmetry increases the modal-conversion contributions [16,17]. In particular, Chen et al [15] showed how symmetrical structures should be used in association with the optimization of ground VIA positions by demonstrating that correct positioning can provide better results when compared to random placement of more ground VIAs.…”

Section: Introduction and State-of-the Artmentioning

confidence: 99%

An Optimization Framework for the Design of High-Speed PCB VIAs

et al. 2022

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Signal integrity represents a key issue in all modern electronic systems, which are strongly dominated by the extreme component density usually employed on PCBs and the associated increase in the interconnection density. The use of multi-layer structures with microstrips connected by various types of Vertical Interconnect Accesses (VIAs) calls for design strategies that reduce the impedance mismatch and signal attenuation. The paper proposes a thorough analysis of the effects associated with the VIA geometry and presents a parametric evaluation of them. The obtained results represent the starting point for a possible design procedure that manages the geometric aspects of differential VIAs, aiming to optimize their electrical performance while reducing their occupation of PCB area. The optimization technique considers a differential VIA as a four-port circuit whose characteristics are evaluated with suitable Figures of Merit (FoMs), thus striving for an optimal design obtained with closed-loop iterations. The analysis is performed in both the time (TDR: Time-Domain Reflectometry) and frequency domains (S and Z parameters), thus allowing a dramatic reduction in the number of cases to be analyzed. The procedure is thoroughly described and validated using simulation results.

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