2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) 2019
DOI: 10.1109/ipdpsw.2019.00021
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VirtP4: An Architecture for P4 Virtualization

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Cited by 8 publications
(2 citation statements)
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“…Since this is never instantaneous, it can lead to some downtime, state loss, and service interruptions for all NFs deployed on the switch and all flows processed by it. Fortunately, various data-plane reconfiguration approaches facilitate uninterrupted reconfigurability of the data-plane [9], [23], [29], and should be used to enable dynamic NF placement. In this paper, for simplicity, the P4-program contains all the NFs, and we just update a register indicating if the NF is active or not.…”
Section: Overhead and Limitationsmentioning
confidence: 99%
“…Since this is never instantaneous, it can lead to some downtime, state loss, and service interruptions for all NFs deployed on the switch and all flows processed by it. Fortunately, various data-plane reconfiguration approaches facilitate uninterrupted reconfigurability of the data-plane [9], [23], [29], and should be used to enable dynamic NF placement. In this paper, for simplicity, the P4-program contains all the NFs, and we just update a register indicating if the NF is active or not.…”
Section: Overhead and Limitationsmentioning
confidence: 99%
“…These hypervisors may, however, impose severe performance overhead to programmable switch virtualization, considering the multiple match-action tables that these hypervisors require. Additionally, even though other prior solutions offer support to P4-based switch parallel execution [8,9], they lack in replacing virtual instances without affecting the data plane state.…”
Section: Introductionmentioning
confidence: 99%