Virtual-Path-Based Timing Optimization for VLSI Global Placement

Chen, Weijie; Huang, Haishan; Wei, Min; Zou, Peng; Chen, Jianli

doi:10.1109/icsict55466.2022.9963291

2022 IEEE 16th International Conference on Solid-State &Amp; Integrated Circuit Technology (ICSICT) 2022

DOI: 10.1109/icsict55466.2022.9963291

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Virtual-Path-Based Timing Optimization for VLSI Global Placement

Weijie Chen

Haishan Huang

Min Wei

et al.

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Virtual-Path-Based Timing Optimization for VLSI Global Placement

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