Virtual UARTs for Reconfigurable Multi-processor Architectures

When partially reconfigurable, FPGA-based, systems allow to dynamically hot-plug processors, the number of possible software configurations increases and the dynamic sharing of hardware peripherals becomes problematic. Moreover, the debugging of application processes, which needs physical devices to communicate with remote users or debuggers, is a critical service that becomes extremely difficult to implement. This work puts forward the concept of virtual devices to reduce software complexity and isolate system services from applications. It is illustrated by a methodology making the design of debug paths easier. Several experiments show that heterogeneous systems of up to 24 hot-pluggable processors can take advantage of virtual devices.

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Virtual Devices for Hot-Pluggable Processors

Bomel

Martin

Diguet

2014

2014 17th Euromicro Conference on Digital System Design

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Hardware/software debugging of large scale many-core architectures

Friederich

Heisswolf

Becker

2014

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design

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Virtual UARTs for Reconfigurable Multi-processor Architectures

Cited by 2 publications

References 3 publications

Virtual Devices for Hot-Pluggable Processors

Virtual Devices for Hot-Pluggable Processors

Hardware/software debugging of large scale many-core architectures

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