Visual counterexample explanation for model checking with OERITTE

Ovsiannikova, Polina; Buzhinskyt, Igor; Pakonen, Antti; Vyatkin, Valeriy

doi:10.1109/iceccs51672.2020.00008

Cited by 2 publications

(3 citation statements)

References 16 publications

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“…Figure 5a shows the results for the temporal logics used to specify requirements in the primary studies. 9 31 primary studies (27% of all primary studies) use LTL and 10 (9%) use CTL. For both cases, approaches that use graphical representations of counterexamples exist (e. g., [42,89,111,112] for LTL, and [98,113,114] for CTL).…”

Section: Specification Logicmentioning

confidence: 99%

“…Finally, 17 primary studies (18%) use example applications. Mostly, such applications are used to demonstrate the proposed approach, e. g., for graphical representations of counterexamples [35,128,151].…”

Section: Types Of Applicationsmentioning

confidence: 99%

“…Once the system and requirements are formalized, model checking is attractive as it is an automated method and offers counterexamples if a system model fails to satisfy a requirement, serving as indispensable debugging information [3]. However, counterexamples are only the symptoms of faults and understanding a counterexample to identify a fault in the system model is a complicated task for several reasons: (R1) a counterexample is often cryptic and lengthy [5], (R2) not all the states in a counterexample are relevant to an error [6], (R3) not all the variables in a state have any relation to the violated specification [6], (R4) the debugging task is performed manually, which is time-consuming and error-prone [5,[7][8][9], and (R5) the counterexample does not explicitly highlight the source of the error that is hidden in the model [7]. These challenges call for a method to explain counterexamples, assisting system designers in localizing faults in their models [10].…”

Section: Introductionmentioning

confidence: 99%

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A systematic literature review on counterexample explanation

Kaleeswaran,

Nordmann,

Vogel

et al. 2022

Preprint

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Context: Safety is of paramount importance for cyber-physical systems in domains such as automotive, robotics, and avionics. Formal methods such as model checking are one way to ensure the safety of cyber-physical systems. However, adoption of formal methods in industry is hindered by usability issues, particularly the difficulty of understanding model checking results. Objective: We want to provide an overview of the state of the art for counterexample explanation by investigating the contexts, techniques, and evaluation of research approaches in this field. This overview shall provide an understanding of current and guide future research. Method: To provide this overview, we conducted a systematic literature review. The survey comprises 116 publications that address counterexample explanations for model checking. Results: Most primary studies provide counterexample explanations graphically or as traces, minimize counterexamples to reduce complexity, localize errors in the models expressed in the input formats of model checkers, support linear temporal logic or computation tree logic specifications, and use model checkers of the Smybolic Model Verifier family. Several studies evaluate their approaches in safety-critical domains with industrial applications. Conclusion: We notably see a lack of research on counterexample explanation that targets probabilistic and real-time systems, leverages the explanations to domain-specific models, and evaluates approaches in user studies. We conclude by discussing the adequacy of different types of explanations for users with varying domain and formal methods expertise, showing the need to support laypersons in understanding model checking results to increase adoption of formal methods in industry.

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Section: Specification Logicmentioning

confidence: 99%

Section: Types Of Applicationsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A systematic literature review on counterexample explanation

Kaleeswaran,

Nordmann,

Vogel

et al. 2022

Preprint

View full text Add to dashboard Cite

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Formal Verification of Autonomous Vehicles: Bridging the Gap between Model-Based Design and Model Checking

Rao¹,

Wang²

2023

SAE Technical Paper Series

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<div class="section abstract"><div class="htmlview paragraph">Formal verification plays an important role in proving the safety of autonomous vehicles (AV). It is crucial to find errors in the AV system model to ensure safety critical features are not compromised. Model checking is a formal verification method which checks if the finite state machine (FSM) model meets system requirements. These requirements can be expressed as linear Temporal logic (LTL) formulae to describe a sequence of states with linear Temporal properties to be satisfied. NuSMV is a dedicated software for performing model checking based on Temporal logic formulae on FSM models. However, NuSMV does not provide model-based design. On the other hand, Stateflow in MATLAB/SIMULINK is a powerful tool for designing the model and offers an interactive Graphical User Interface (GUI) for the user/verifier but is not as efficient as NuSMV in model checking. Hence, model transformation becomes vital to convert the AV model in Stateflow to an input language of model checking software such as NuSMV. In this paper, we model an AV using Stateflow, which consists of cruise control, lane change/abortion, obstacle avoidance and gap maintenance blocks in the form of FSMs. We design an automatic verification tool to perform model transformation using a C compiler with NuSMV library included. Guard conditions are represented by Boolean expressions to capture the transition sequence between different blocks. LTL specifications of safety critical requirements are verified to guarantee the validity of the AV system design. When guard conditions fail, i.e., system requirements are not met, the verification tool will give a counterexample as the output. A case study is performed to show how this verification tool can help designers to make modifications based on the counterexamples to better meet the system requirements. We also perform a benchmark verification using the design verifier in SIMULINK to compare the performance. <span class="xref"><sup>1</sup></span></div></div>

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Visual counterexample explanation for model checking with OERITTE

Cited by 2 publications

References 16 publications

A systematic literature review on counterexample explanation

A systematic literature review on counterexample explanation

Formal Verification of Autonomous Vehicles: Bridging the Gap between Model-Based Design and Model Checking

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