Visualizing application behavior on superscalar processors

Stolte, Chris; Bosch, Robert; Hanrahan, Pat; Rosenblum, Mendel

doi:10.1109/infvis.1999.801852

Cited by 20 publications

(19 citation statements)

References 11 publications

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“…RELATED WORK PSE is not the first, nor is it the only instruction-level visualization tool. Stolte et al, developed Rivet, an early visualization system for dynamically scheduled processors [3]. This tool presented visualizations that showed instruction positions in core structures, such as the reorder buffer, over time.…”

Section: B Milc Examplementioning

confidence: 99%

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Discovering Barriers to Efficient Execution, Both Obvious and Subtle, Using Instruction-Level Visualization

Koppelman

Michael

2014

2014 First Workshop on Visual Performance Analysis

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Abstract-CPU performance is determined by the interaction between available resources, microarchitectural features, the execution of instructions, and by the data. These elements can interact in complex ways, making it difficult for those seeing only aggregate performance numbers, such as miss ratios and issue rates, to determine whether there are reasonable avenues for performance improvement. A technique called instructionlevel visualization helps users connect these disparate elements by showing the timing of the execution of individual program instructions. The PSE visualization program enhances instructionlevel visualization by showing which instructions contribute to execution inefficiency in a way that makes it easy to locate dependent instructions and the history of events affecting the instruction. A simple annotation system makes it easy for a user to attach custom information. PSE has been used for microarchitecture research, simulator debugging, and for instructional use.

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Section: B Milc Examplementioning

confidence: 99%

“…PSE, though in use for over ten years, is not the first instruction-level visualization system. Stolte et al in 1999 [3] and Weaver et al [4] in 2001 describe earlier systems, and the popular SimpleScalar simulator collection has long had a visualization tool, ss-vis [5].…”

Section: Introductionmentioning

confidence: 99%

Discovering Barriers to Efficient Execution, Both Obvious and Subtle, Using Instruction-Level Visualization

Koppelman

Michael

2014

2014 First Workshop on Visual Performance Analysis

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“…At the system level, whole-system data is collected in an attempt to visualize the various parts of the machine as an execution is carried out. Stolte et al [5] present a system that visualizes important processor internals, such as functional unit utilization and pipeline stalls, and allows for drilling down to show details about certain subsystems. At the application level, runtime data is visualized in the familiar context of source code.…”

Section: Related Work a Memory Behavior Visualizationmentioning

confidence: 99%

Abstract visualization of runtime memory behavior

Choudhury

Rosen

2011

2011 6th International Workshop on Visualizing Software for Understanding and Analysis (VISSOFT)

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Abstract-We present a system for visualizing memory reference traces, the records of the memory transactions performed by a program at runtime. The visualization consists of a structured layout representing the levels of a cache and a set of data glyphs representing the pieces of data in memory being operated on during application runtime. The data glyphs move in response to events generated by a cache simulator, indicating their changing residency in the various levels of the memory hierarchy. Within the levels, the glyphs arrange themselves into higher-order shapes representing the structure of the cache levels, including the composition of their associative cache sets and eviction ordering. We make careful use of different visual channels, including structure, motion, color, and size, to convey salient events as they occur. Our abstract visualization provides a high-level, global view of memory behavior, while giving insight about important events that may help students or software engineers to better understand their software's performance and behavior. I. INTRODUCTIONThe interactions between modern hardware and software systems are increasingly complex which can result in unexpected interactions and behaviors that seriously affect software performance costing time and money. To address this issue, students and software engineers often spend a significant amount of their time understanding performance and optimizing their software.One common performance analysis technique is to track cache activity within an application. This information is usually provided for very coarse time granularity. At best, cache performance is provided for blocks of code or individual functions. At worst, these results are captured for an entire application's execution. This provides only a global view of performance and limits the ability to intuitively understand performance. An alternative to this coarse granularity is to generate a memory reference trace, which can then be run through a cache simulator to produce a fine-grained approximation of the software's actual cache performance.The biggest challenge when using this approach is sifting through the volume of data produced. Even simple applications can produce millions of references, yet this data contains valuable information that needs to be extracted to better understand program performance. The use of statistical methods or averaging simply produces a coarse understanding of software performance, forgoing the detail available in the trace. Static analysis of memory behavior is also possible [1], but limited only to cases where the program behavior can be deduced at compile time.To address these problems, we propose visualizing the simulated cache and the reference trace, allowing developers

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“…These systems generate trace data directly from the running program and process it on the fly, in such a way as to minimize runtime overhead. Stolte et al [SBHR99] demonstrate a system that visualizes important processor internals, such as pipeline stalls, instruction dependencies, and the contents of the reorder buffer and functional units.…”

Section: Execution Trace Visualizationmentioning

confidence: 99%