VLC Using 800-μm Diameter APD Receiver Integrated in Standard 0.35-μm BiCMOS Technology

Abstract

The fully integrated 800 μm. diameter avalanche photodiode optical receiver is implemented in 0.35 μm BiCMOS technology without any process modifications. The integrated receiver reaches sensitivities of-33 dBm at 1 Gbit/s and-29.3 dBm at 2 Gbit/s. The reached sensitivities are well within the state-of-the-art of integrated avalanche photodiode receivers and can even be compared to a hybrid avalanche photodiode receiver comprised of high-performing commercial components. The performance of the designed receiver was verified in visible light communication experiments. The receiver could reach up to 16.5 m at 2 Gbit/s and 27 m at 1 Gbit/s of error free transmission distance using a 675-nm point laser source as transmitter. The common indoor illuminance levels up to 500 lux could be tolerated when pointed directly towards the receiver. High sensitivity and high speed make this integrated receiver suitable for future optical wireless communication systems, where due to its integrated nature the manufacturing cost can be lowered, and at the same time the design is compact in size and easy to assemble and scale. Furthermore, no optics is used in front of the receiver due to its large area resulting in a wide field of view.

Bit Error Performance of APD and SPAD Receivers in Optical Wireless Communication

“…The thick absorption zone of the integrated pin photodiode in 0.35 µm (Bi)CMOS [23] was exploited for an integrated reach-through APD [30], by adding the p-well as a multiplication zone (see Figure 1a). Fortunately, the p-well of the process can be already completely depleted below the breakdown voltage, so that the thick absorption zone (p-epitaxial layer) is also fully depleted in the linear APD mode.…”

“…Via pin-photodiode APDs, with diameters of 200, 400 and 600 µm, we ended up with an 800 µm-diameter APD integrated in a 0.35 µm BiCMOS receiver [30]. A segmentation of the large-area APDs for high data rates as it was used in [32] was not necessary.…”

“…The capacitance of the 800 µm-diameter APD was 7 pF. Modulation doping of the p-well was applied in [30] to extend the bandwidth of the APD at the expense of a higher breakdown voltage. The excess noise of the HV-CMOS APD was the smallest and modulation doping increased the excess noise of the pin-photodiode APD [30].…”

“…Modulation doping of the p-well was applied in [30] to extend the bandwidth of the APD at the expense of a higher breakdown voltage. The excess noise of the HV-CMOS APD was the smallest and modulation doping increased the excess noise of the pin-photodiode APD [30]. The 200 µm-pin-APD BiCMOS optoelectronic integrated circuit (OEIC) reached a sensitivity of −32.2 dBm at a BER of 10 −9 for a data rate of 2 Gbit/s (λ = 675 nm, PRBS31) [30].…”

“…The 200 µm-pin-APD BiCMOS optoelectronic integrated circuit (OEIC) reached a sensitivity of −32.2 dBm at a BER of 10 −9 for a data rate of 2 Gbit/s (λ = 675 nm, PRBS31) [30]. The 400 µm pin-APD, accomplished −30.6 dBm [30] and the 600-µm-pin-APD BiCMOS OEIC showed a sensitivity of −29.7 dBm at 2 Gb/s (BER = 10 −9 ). Via pin-photodiode APDs, with diameters of 200, 400 and 600 µm, we ended up with an 800 µm-diameter APD integrated in a 0.35 µm BiCMOS receiver [30].…”