2005 IEEE International Symposium on Circuits and Systems
DOI: 10.1109/iscas.2005.1465645
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VLSI Architecture of Low Memory and High Speed 2-D Lifting-Based Discrete Wavelet Transform for JPEG2000 Applications

Jen‐Shiun Chiang
1
,
Chih-Hsien Hsia
2
,
Hsin-Jung Chen
3
et al.
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Cited by 10 publications
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References 12 publications
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Parallel Architecture for 2-D Discrete Wavelet Transform with Low Energy Consumption

Ishihara
1
,
Abe
2
2008
IEICE Transactions on Fundamentals of Electronics, Communicatio
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0
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Parallel Architecture for 2-D Discrete Wavelet Transform with Low Energy Consumption

Ishihara
1
,
Abe
2
2008
IEICE Transactions on Fundamentals of Electronics, Communicatio
0
0
0
0
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Efficient Memory Subsystem for High Throughput JPEG2000 2D-DWT Encoder

Li
1
,
Dou
2
,
Song
3
2008
2008 Congress on Image and Signal Processing
2
0
0
0
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Deeply Parallel Architecture for Lifting-Based 2D DWT in JPEG2000

Li
1
,
Song
2
2006
The Sixth IEEE International Conference on Computer and Information Technology (CIT'06)
3
0
1
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