2012
DOI: 10.5120/6224-8189
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VLSI Implementation of Scalable Encryption Algorithm for Different Text and Processor Size

Abstract: The Efficiency of present symmetric encryption algorithms mainly depends on implementation cost and resulting performances. Present symmetric encryption, like the Advanced Encryption Standard (AES) rather focus on finding a good tradeoff between cost, security and performances. Some present symmetric encryption algorithms are targeted for software implementations and shows significant efficiency improvements on these platforms compared to other algorithms. From these algorithms, consider a general context wher… Show more

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Cited by 1 publication
(3 citation statements)
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“…It is essential that n is a multiple of 6b, means for an 8-bit processor size, we can have 48, 96, 144, 192…-bit block cipher [2]. …”
Section: A Basic Parametersmentioning
confidence: 99%
See 2 more Smart Citations
“…It is essential that n is a multiple of 6b, means for an 8-bit processor size, we can have 48, 96, 144, 192…-bit block cipher [2]. …”
Section: A Basic Parametersmentioning
confidence: 99%
“…Figure 5. Architecture of Decryption Block [2] Decryption block has been implemented as a module and all other modules like Modulo addition, S-Box, Bit rotation, Inverse Word rotation are internal modules of it. The Feistel structure ensures that decryption and encryption are very similar processes but the only difference is that the Subkeys are applied in the reverse order when decrypting.…”
Section: ) Encryption Unitmentioning
confidence: 99%
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