VMon: Monitoring and Quantifying Virtual Machine Interference via Hardware Performance Counter

Wang, Sa; Zhang, Wenbo; Wang, Tao; Ye, Chunyang; Huang, Tao

doi:10.1109/compsac.2015.14

Cited by 16 publications

(8 citation statements)

References 15 publications

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“…Wang et al 23 and Eklöv et al 24 quantified memory and cache interferences based on the hardware performance counters and LLC miss rate. Koh et al 25 ran a wide range of benchmarks and real-world workloads and collected performance metrics, thus modeled the interference with linear regression methods.…”

Section: Related Workmentioning

confidence: 99%

“…Xu et al 21 developed a thorough understanding of the state-of-the-art researches on managing the VM performance, and this method also summarized the pros and cons of each existing solution. Zhao et al, 5 Lin and Chen, 6 Chiang and Huang, 7 Zhu and Tung, 10 Wang et al 23 and Eklöv et al 24 quantified memory and cache interferences based on the hardware performance counters and LLC miss rate. Koh et al 25 ran a wide range of benchmarks and real-world workloads and collected performance metrics, thus modeled the interference with linear regression methods.…”

Section: Related Workmentioning

confidence: 99%

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Measuring performance degradation of virtual machines based on the Bayesian network with hidden variables

Hao

Zhang

Yue

et al. 2018

Int J Communication

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In the virtualized environment, multiple virtual machines (VMs) sharing the same physical host are vulnerable to resource competition, which may cause performance interference among VMs and thus lead to VM performance degradation. This paper focuses on measuring CPU, memory, I/O, and the overall VM performance degradation caused by the performance interference according to the properties in the runtime environment of VMs. To this end, we adopt Bayesian network (BN), as the framework for uncertainty representation and inference, and construct a VM property-performance BN (VPBN) with hidden variables, which represent the unobserved performance degradation of CPU, memory, and I/O, respectively. Then, we present the method to measure performance degradation of VMs by probabilistic inferences with the VPBN. Experimental results show the accuracy and efficiency of our method.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Measuring performance degradation of virtual machines based on the Bayesian network with hidden variables

Hao

Zhang

Yue

et al. 2018

Int J Communication

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“…Wang et al, [19], use HPCs to monitor and quantify the interference between virtual machines located in the same host and competing for shared physical resources. Using Last Level Cache (LLC) miss-rates, one of the many counters available, the data is fed into the interference prediction model to predict performance degradation between virtual machines and the information gathered can determine which virtual machine is utilising most of the resources.…”

Section: Applications Of Hpcs In Other Areasmentioning

confidence: 99%

Hardware performance counters for system reliability monitoring

Leng

Zwoliński

Halak

2017

2017 IEEE 2nd International Verification and Security Workshop (IVSW)

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As technology scaling reaches nanometre scales, the error rate due to variations in temperature and voltage, single event effects and component degradation increases, making components less reliable. In order to ensure a system continues to function correctly while facing known reliability issues, it is imperative that the system should have the means to detect the occurrence of errors due to the presence of faults. A system that behaves normally (no error detected in the system) exhibits a profile, and any deviations from this profile indicate that there is an anomaly in the system. In this paper, we propose to use hardware performance counters (HPCs) to measure events that occur during the execution of the program. We explore the various counters available which could be use to identify the anomalous behaviour in the system and develop a methodology to observe the anomalies using HPCs by creating a faultfree pattern and observing any subsequent changes in that pattern. We evaluate the proposed technique using GemFI, an architectural simulator based on Gem5 with additional fault injection capabilities. We compare the results obtained at the end of the execution with data collected during a time interval. Our results show that HPCs can be used to identify anomalous behaviour in a system that would lead to failure.

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“…With their monitoring tool, they are able to gather statistics about CPU usage for processes and the hypervisor. Wang in [17] used Perf to detect over-commitment of pCPUs. From all available CPU metrics, they used LLC which has a direct relationship with pCPUs over-commitment.…”

Section: Related Workmentioning

confidence: 99%