Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications

Sung, Po-Jung; Chang, Chun Yen; Chen, L.-Y.; Kao, Kuo-Hsing; Su, Chun-Jung; Liao, Tzu-Han; Fang, Chih-Cheng; Wang, C.-J.; Hong, Tzu-Chieh; Jao, Che-Yu; Hsu, Hui-Shun; Luo, Shien-Chun; Wang, Yi-Sheng; Huang, Hao; Li, J.-H.; Huang, Yu‐Ching; Hsueh, Fu-Kuo; Wu, Chonggang; Huang, Yao-Ming; Hou, Fu-Ju; Luo, Guang-Li; Shen, Yi; C.-Y., W.; Huang, Kun-Ping; Lin, Kuei-Huei; Samukawa, Seiji; Li, Y.; Huang, Guo–Wei; Lee, Y.-J.; Li, J.-Y.; Wu, Wen−Fa; Shieh, Jia‐Min; Chao, Tien−Sheng; Yeh, Wen–Kuan; Wang, Y.-H.

doi:10.1109/iedm.2018.8614553

Cited by 12 publications

(1 citation statement)

References 2 publications

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“…Figure 10 shows the benchmark of the I on per stack versus SS for group IV nGAAFETs [7,17,[25][26][27][28][29][30][31][32][33]. The optimized device achieves low SS=76 mV/dec, and the high I on of 15.2 μA per stack at V OV =V DS =0.5 V. The device has competitive performance in group IV nGAAFETs.…”

Section: Benchmarkmentioning

confidence: 99%

Novel vertically stacked Ge_0.85Si_0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedI_on(1.7X atV_OV=V_DS= 0.5 V) by Ge_0.85Si_0.15channels

Liu¹,

Huang²,

Lu³

et al. 2020

Semicond. Sci. Technol.

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An engineering solution is provided to improve the electrostatic behaviors of Ge-based channels gate-all-around FETs. We demonstrate the vertically stacked Ge 0.85 Si 0.15 channels above a Si channel, which has good subthreshold behaviors. The two Ge 0.85 Si 0.15 channels are tensily strained to improve I on . With optimized channel dimensions, the threshold voltage of Ge 0.85 Si 0.15 channels is more positive than the Si channel by quantum confinement. Therefore, the underneath Si channel with good electrostatic control dominates the subthreshold region. Good subthreshold slope=76 mV/dec and low drain-induced barrier lowering=36 mV/V are achieved. For on-state, the stacked high-mobility GeSi channels turn on after the Si channel to achieve I on of 13.9 μA per stack at V OV =V DS =0.5 V.

show abstract

Section: Benchmarkmentioning

confidence: 99%

Novel vertically stacked Ge_0.85Si_0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedI_on(1.7X atV_OV=V_DS= 0.5 V) by Ge_0.85Si_0.15channels

Liu¹,

Huang²,

Lu³

et al. 2020

Semicond. Sci. Technol.

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Drain-engineered vertically stacked junctionless FET exhibiting complementary operation

2020

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A new Vertical C-shaped Silicon Channel Nanosheet FET with Stacked High-K Dielectrics for Low Power Applications

I.V,

Ajayan

et al. 2024

Silicon

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Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications

Cited by 12 publications

References 2 publications

Novel vertically stacked Ge_0.85Si_0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedI_on(1.7X atV_OV=V_DS= 0.5 V) by Ge_0.85Si_0.15channels

Novel vertically stacked Ge_0.85Si_0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedI_on(1.7X atV_OV=V_DS= 0.5 V) by Ge_0.85Si_0.15channels

Drain-engineered vertically stacked junctionless FET exhibiting complementary operation

A new Vertical C-shaped Silicon Channel Nanosheet FET with Stacked High-K Dielectrics for Low Power Applications

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Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications

Cited by 12 publications

References 2 publications

Novel vertically stacked Ge0.85Si0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedIon(1.7X atVOV=VDS= 0.5 V) by Ge0.85Si0.15channels

Novel vertically stacked Ge0.85Si0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedIon(1.7X atVOV=VDS= 0.5 V) by Ge0.85Si0.15channels

Drain-engineered vertically stacked junctionless FET exhibiting complementary operation

A new Vertical C-shaped Silicon Channel Nanosheet FET with Stacked High-K Dielectrics for Low Power Applications

Contact Info

Product

Resources

About

Novel vertically stacked Ge_0.85Si_0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedI_on(1.7X atV_OV=V_DS= 0.5 V) by Ge_0.85Si_0.15channels

Novel vertically stacked Ge_0.85Si_0.15nGAAFETs above a Si channel with low SS of 76 mV/dec by underneath Si channel and enhancedI_on(1.7X atV_OV=V_DS= 0.5 V) by Ge_0.85Si_0.15channels