W-Band CMOS Wilkinson Power Divider

Abstract

This paper presents the design of W-band Wilkinson power divider using 65 nm bulk CMOS process. In this design, the quarter-wavelength (λ/4) transmission line was replaced with a lumped element, and a CRC structure was applied to the isolation network circuit. In addition, a metal wall was installed between the two output lines to enhance isolation. This power divider had a maximum insertion loss of 1.93 dB and a minimum isolation of 13.3 dB in the 75∼110 GHz band. The return loss was more than 7.2 dB, and the size of the core was 0.2×0.12 mm².