W‐band LNA employing current reuse and non‐linearity cancellation in 28 nm CMOS for automotive radar and 6G applications

Abstract

This work reports a W‐band 2‐stage stacked LNA featuring post‐distortion non‐linearity cancellation (PDC) with programmable gain and enhanced common‐mode (CM) stability, fabricated in TSMC 28‐nm complementary metal oxide semiconductor (CMOS). The PDC technique employs diode‐connected NMOS transistors to enhance linearity. The diodes are connected to drains of the stage one and, therefore, are isolated from the input, leading to minimal impact on input matching. Since the diodes are in strong inversion, they track well with the main transistors, resulting in robust cancellation across PVT. Additionally, the diodes also enhance the CM stability of the LNA by reducing the CM gain. Use of stacked architecture lowers the DC power consumption, through current re‐use in the two stages. Switchable neutralized differential pair cells are used in stage one to achieve variable gain. The LNA consumes 31 mW of power with an IP1dB of ‐5.5 dBm and IIP3 of 6 dBm leading to an figure‐of‐merit (FOM) of 31.3 dB. The peak gain is 13 dB at 84.2 GHz, and it maintains 5 dB gain between 75 and 95 GHz. The LNA has 2.7 dB of programmable gain control. The minimum measured NF is 6.78 dB at 89.4 GHz. The proposed LNA is suitable for high‐linearity receivers for automotive radar and 6G applications.