Wafer Level 3D-stacked Integration Technology with Coplanar Hot via MMIC for mm-Wave Low-profile Applications

Abstract

Wafer-level three-dimensional stacked integration technology is demonstrated in this paper, employing three gallium arsenide (GaAs) monolithic integrated circuits (MMICs) and gold (Au) bumps, and specifically designed for high-density and low-profile applications operating at millimeter-wave frequencies. A ground coplanar waveguide to ground coplanar waveguide (GCPW to GCPW) hot via interconnect has been developed to facilitate vertical transitions within a multi-stacked electromagnetic (EM) environment. Electrical connection between the upper and lower layers is achieved through 70 µm-height Au bumps. Compared to 2.5D packaging, this innovative structure exhibits an increased integration capability of more than three times within the same area, with a thickness of 0.451 mm. Ultra-wideband transmission between RF chips is achieved within a compact area of 0.16 square millimeters, enabling extremely shortdistance interconnect for system-in-package configurations. Appropriate utilization of ground metal within the package ensures strict electromagnetic field confinement, preventing interference from adjacent circuits. The designed transitions were fabricated and characterized. The measured result has an insertion loss of less than 0.65 dB and return loss of better than 20 dB up to 40 GHz for a back-to-back structure. This integration technology can further enhance integration capability, reduce transmission loss, and improve electromagnetic isolation. The presented approach holds significant potential for applications requiring high-density integration and reliable performance in the millimeter-wave regime.