Wafer-scale fabrication of carbon-nanotube-based CMOS transistors and circuits with high thermal stability

Wafer-Scale Carbon Nanotubes Diodes Based on Dielectric-Induced Electrostatic Doping

“…Please refer to the article "Wafer-scale fabrication of carbonnanotube-based CMOS transistors and circuits with high thermal stability" for details. 13 A brief description of the relevant procedures is as follows:…”

“…47,48 The mechanism of this device follows the basic diode principle to inject holes and electrons to the valence and conductance band of the channel material, respectively, yet it overcomes several limitations of the previously reported schemes. In effect, this diode is created by joining half of the p-type transistor and half of the n-type transistor in an established process 13 together, which is quite similar to how the BFBD is to the doping-free transistors. Electrostatic doping using the established dielectric material provides much higher thermal stability than the aforementioned chemical doping schema, and a high-voltage control gate is no longer necessary.…”

“…Si/SiO 2 wafer are designed and manufactured based on randomly oriented CNTs film (∼22 CNTs/μm, Figure S1 in the Supporting Information) with high uniformity (see details in Figure S2). 13 Figure 1a shows the CNTs device and circuit array fabricated with a standardized process flow. The 4 in.…”

“…Among materials that show promise in higher-performance electronics as well as radio frequency and sensing applications, carbon nanotubes (CNTs) stand out offering stability, band gap, and superb electrical and thermal properties . Carbon-based circuits have achieved considerable technology readiness, to offer wafer-scale fabrication of large-scale integrated circuits. , Unfortunately, despite the extensive investigation into transistors, efforts to make the carbon-based technology into a functional whole for more-than-Moore electronics are lagging behind. Diodes can, in principle, be made by injecting the valence band of the channel material with holes via the anode and conduction band with electrons via the cathode.…”

Modulated wafer-scale WS2 films based on atomic-layer-deposition for various device applications

“…25 ALD is ideal for sub-10 nm lm growth with unique and superior growth characteristics, such as wafer-scale growth, excellent uniformity, and CMOS process compatibility. 26,27 In addition, compared with CVD, a common technique for TMDs studies in lab scale, ALD holds many advantages, such as precise controllability (e.g., thickness, morphology, and doping), 28,29 low deposition temperature, and excellent step coverage, 30 all of which that are benecial for the construction of advanced non-planar geometry devices like Fin-FETs and gate-all-around FETs. 31 ALD is based on a self-limiting growth mechanism, and a thin lm is formed on a substrate surface by surface adsorption and chemical reaction.…”