Warpage Measurement of Thin Wafers by Reflectometry

Ng, Chi Seng; Asundi, Anand

doi:10.1016/j.phpro.2011.06.119

Cited by 12 publications

(9 citation statements)

References 7 publications

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“…proposed an in situ fault detection technique for wafer warpage in lithography using thermal model and advanced process control technique. Ng and Asundi 30 considered the versatility of computer aided reflection grating method to obtain slope of the wafer surface. Kim et al 91 .…”

Section: Related Literaturementioning

confidence: 99%

“…As the thickness of the wafer decreases and large stresses are induced during manufacturing processes such as film deposition, CMP, lithography, etch, and various thermal processes, an increasing trend of wafer warpage has been seen 27,28 . In the past few years, several patterned wafer geometry (PWG) metrology tools have been employed to measure wafer distortion 29,30 . Thus, in this research, we consider semiconductor wafer defect bin data combined with wafer warpage information and propose a novel hybrid resampling technique to improve the performance of wafer defect bin classifiers.…”

Section: Introductionmentioning

confidence: 99%

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A novel hybrid resampling for semiconductor wafer defect bin classification

Park

Pan

Montgomery

2022

Quality & Reliability Eng

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Generally, defective dies on semiconductor wafer maps tend to form spatial clusters in distinguishable patterns which contain crucial information on specific problems of equipment or process, thus it is highly important to identify and classify diverse defect patterns accurately. However, in practice, there exists a serious class imbalance problem, that is, the number of the defective dies on semiconductor wafer maps is usually much smaller than that of the non-defective dies. In various machine learning applications, a typical classification algorithm is, however, developed under the assumption that the number of instances for each class is nearly balanced. If the conventional classification algorithm is applied to a class imbalanced dataset, it may lead to incorrect classification results and degrade the reliability of the classification algorithm. In this research, we consider the semiconductor wafer defect bin data combined with wafer warpage information and propose a new hybrid resampling algorithm to improve performance of classifiers. From the experimental analysis, we show that the proposed algorithm provides better classification performance compared to other data preprocessing methods regardless of classification models.

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Section: Related Literaturementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A novel hybrid resampling for semiconductor wafer defect bin classification

Park

Pan

Montgomery

2022

Quality & Reliability Eng

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“…Therefore, a rigid wafer support system is required to handle ultrathin wafers in the wafer fabrication and packaging assembly processes [21], [22]. High wafer bow/warp due to residual stresses also increases the risk of die chippage and cracks during the wafer dicing process, thus, weakening the mechanical and electrical properties of the singulated die [40].…”

Section: A Bow Warp and Ttvmentioning

confidence: 99%

“…Computer-aided reflection moiré has gained popularity for wafer bow/warp measurements because of its relatively fast full-field measurement, compared with current optical pointby-point measurement methods [40], [41]. Another advantage of this method is the simple equipment setup and easy implementation.…”

Section: A Bow Warp and Ttvmentioning

confidence: 99%

Characterization Methods for Ultrathin Wafer and Die Quality: A Review

Marks

Hassan

Cheong

2014

IEEE Trans. Compon., Packag. Manufact. Technol.

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Ultrathin silicon die is a key enabler for highperformance semiconductor devices and ultrathin packaging. The quality of ultrathin wafers and dies has a significant influence on packaging assembly yield and device reliability.The key quality characteristics of ultrathin wafers and dies are bow/warpage, total thickness variation (TTV), subsurface damage (SSD), surface roughness, and mechanical strength. Wafer and die bow/warpage cause handling and processing problems in manufacturing processes, and induce defects during various packaging assembly processes that eventually lead to device reliability issues. The wafer TTV requirement is becoming more stringent for new generations of thin and 3-D packages. SSD, surface roughness, and dicing defects have adverse effects on die mechanical strength and reliability. Therefore, characterization methods are needed for these quality characteristics to control the manufacturing processes for ultrathin wafers and dies to ensure good device performance and reliability. The following ultrathin wafer and die characterization techniques are discussed in this paper: noncontact bow/warp/TTV measurement, materialographic analysis with optical and electron microscopy, high-resolution X-ray diffraction, micro-Raman spectroscopy, scanning infrared depolarization, optical profilometry, atomic force microscopy, and uniaxial/biaxial bending tests.Index Terms-Bow, die mechanical strength, subsurface damage (SSD), surface roughness, total thickness variation (TTV), ultrathin die, ultrathin wafer, warpage.

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“…Wafers with low deformation are required since significant deformation caused in the thinning process results in handling and processing issues [5,6]. The flatness measurement plays an important role in production engineering to determine if the flatness of the wafer satisfies given requirements as wafers with large deformation tend to break.…”

Section: Introductionmentioning

confidence: 99%

Analysis Of Factors Affecting Gravity-Induced Deflection For Large And Thin Wafers In Flatness Measurement Using Three-Point-Support Method

Liu

Dong

Kang

et al. 2015

Metrology and Measurement Systems

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Accurate flatness measurement of silicon wafers is affected greatly by the gravity-induced deflection (GID) of the wafers, especially for large and thin wafers. The three-point-support method is a preferred method for the measurement, in which the GID uniquely determined by the positions of the supports could be calculated and subtracted. The accurate calculation of GID is affected by the initial stress of the wafer and the positioning errors of the supports. In this paper, a finite element model (FEM) including the effect of initial stress was developed to calculate GID. The influence of the initial stress of the wafer on GID calculation was investigated and verified by experiment. A systematic study of the effects of positioning errors of the support ball and the wafer on GID calculation was conducted. The results showed that the effect of the initial stress could not be neglected for ground wafers. The wafer positioning error and the circumferential error of the support were the most influential factors while the effect of the vertical positioning error was negligible in GID calculation.

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Warpage Measurement of Thin Wafers by Reflectometry

Cited by 12 publications

References 7 publications

A novel hybrid resampling for semiconductor wafer defect bin classification

A novel hybrid resampling for semiconductor wafer defect bin classification

Characterization Methods for Ultrathin Wafer and Die Quality: A Review

Analysis Of Factors Affecting Gravity-Induced Deflection For Large And Thin Wafers In Flatness Measurement Using Three-Point-Support Method

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