WASA: a low power front-end ASIC for time projection chambers in 65 nm CMOS

Liu, W.; Zhao, Xiling; Deng, Zhi; Li, F.; Gu, Xiu; Li, Y.; Qi, Hongxing

doi:10.1088/1748-0221/15/05/p05005

Cited by 7 publications

(5 citation statements)

References 11 publications

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“…For the measurement of energy resolution of SDD device, we have developed a special setup, and Fe-55 was used as a radioactive source. The SDD device and the ASIC (a monolithic CMOS charge sensitive preamplifier designed by the team from Tsinghua university [21][22][23]) were mounted on the specialized circuit board, and the output electrode of SDD device was bonded to the input pad of ASIC. Then, the whole system was placed in a stainless-steel vacuum chamber and cooled in liquid nitrogen.…”

Section: Methodsmentioning

confidence: 99%

The Effects of Different Anode Positions on the Electrical Properties of Square-Silicon Drift Detector

et al. 2022

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The Silicon Drift Detector (SDD) with square structure is often used in pixel-type SDD arrays to reduce the dead region considerably and to improve the detector performance significantly. Usually, the anode is located in the center of the active region of the SDD with square structure (square-SDD), but the different anode positions in the square-SDD active area are also allowed. In order to explore the effect on device performance when the anode is located at different positions in the square-SDD active region, we designed two different types of square-SDD in this work, where the anode is located either in the center (SDD-1) or at the edge (SDD-2) of its active region. The simulation results of current density and potential distribution show that SDD-1 and SDD-2 have both formed a good electron drift path to make the anode collect electrons. The experimental results of device performance at the temperature range from −60 °C to 60 °C show that the anode current of the two fabricated SDDs both decreased with the decrease of temperature, but their voltage divider characteristics exhibited high stability resistance value and low temperature coefficient, thereby indicating that they could both provide corresponding continuous and uniform electric field at different temperatures. Finally, SDD-1 and SDD-2 have energy resolutions of 248 and 257 eV corresponding to the 5.9 keV photon peak of the Fe-55 radioactive source, respectively. Our experimental results demonstrate that there is no significant impact on the device performance irrespective of the anode positions in the square-SDD devices.

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Section: Methodsmentioning

confidence: 99%

The Effects of Different Anode Positions on the Electrical Properties of Square-Silicon Drift Detector

et al. 2022

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“…The supply voltage of the analog front end is reduced to 1.2 V, so the output stage uses a fully differential output to achieve an output voltage swing of 1.2 V. To avoid the influence of detector leakage current and temperature during prolonged operation, the analog front end also integrates a baseline holding circuit to stabilize the output of the CR shaping circuit to a specific level. More detailed design and testing of analog frontends can be found in the literature [10]. Compared to other types of ADCs, a SAR ADC has only one comparator consuming static power.…”

Section: The Afementioning

confidence: 99%

WASA: a low power and high integration readout ASIC for TPCs in 65 nm CMOS

Liu,

Deng

et al. 2024

J. Inst.

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The paper presents the development of a low-power and high-integration readout ASIC (WASA) for time projection chambers (TPCs). Each channel of the ASIC consists of the analog front-end, a waveform sampling ADC and digital signal processing circuits. To reduce power consumption, a simple CR-RC shaper and a digital trapezoid filter are adopted to achieve comparable performance to a CR-RC4 shaper with much lower power. Trigger logic and data buffer have also been integrated to reduce the data bandwidth. A 16-channel prototype chip was fabricated in a 65 nm CMOS process and was tested. The test results were consistent with the simulation. At 40 MSPS sampling rate, the power consumption of the chip was only 4.94 mW per channel, including 1.38 mW from the analog front-end, 0.83 mW from the waveform sampling ADC and 2.73 mW from digital logics. The equivalent noise charge of 569 e+14.8 e/pF has been achieved. The measured dynamic range was 120 fC and the integral nonlinearity was less than 0.74%. More design details and test results will be given in this paper.

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“…Recently, analog-to-digital converters (ADC) with high sampling rates have been used for the readout of nuclear detectors because of their flexibility and property of information preservation [7][8][9][10][11]. It also provides a great opportunity to apply novel machine learning algorithms to traditional problems in nuclear instrumentation.…”

Section: Jinst 17 P02032mentioning

confidence: 99%

Universal uncertainty estimation for nuclear detector signals with neural networks and ensemble learning

Ai¹,

Deng²,

Wang³

et al. 2022

J. Inst.

Self Cite

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Characterizing uncertainty is a common issue in nuclear measurement and has important implications for reliable physical discovery. Traditional methods are either insufficient to cope with the heterogeneous nature of uncertainty or inadequate to perform well with unknown mathematical models. In this paper, we propose using multi-layer convolutional neural networks for empirical uncertainty estimation and feature extraction of nuclear pulse signals. This method is based on deep learning, a recent development of machine learning techniques, which learns the desired mapping function from training data and generalizes to unseen test data. Furthermore, ensemble learning is utilized to estimate the uncertainty originating from trainable parameters of the network and to improve the robustness of the whole model. To evaluate the performance of the proposed method, simulation studies, in comparison with curve fitting, investigate extensive conditions and show its universal applicability. Finally, a case study is made using data from a NICA-MPD electromagnetic calorimeter module exposed to a test beam at DESY, Germany. The uncertainty estimation method successfully detected out-of-distribution samples and also achieved good accuracy in time and energy measurements.

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WASA: a low power front-end ASIC for time projection chambers in 65 nm CMOS

Cited by 7 publications

References 11 publications

The Effects of Different Anode Positions on the Electrical Properties of Square-Silicon Drift Detector

The Effects of Different Anode Positions on the Electrical Properties of Square-Silicon Drift Detector

WASA: a low power and high integration readout ASIC for TPCs in 65 nm CMOS

Universal uncertainty estimation for nuclear detector signals with neural networks and ensemble learning

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