IEEE International Symposium on High-Performance Comp Architecture 2012
DOI: 10.1109/hpca.2012.6169042
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WEST: Cloning data cache behavior using Stochastic Traces

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Cited by 29 publications
(8 citation statements)
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“…Balakrishnan and Solihin [3] proposed collecting the temporal reuse pattern of memory accesses using the stack distance profile. The study demonstrated close match in miss rates between the generated clones compared to the original applications, across cache sizes, associativities, write policies, and number of hierarchy levels.…”
Section: Related Workmentioning
confidence: 99%
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“…Balakrishnan and Solihin [3] proposed collecting the temporal reuse pattern of memory accesses using the stack distance profile. The study demonstrated close match in miss rates between the generated clones compared to the original applications, across cache sizes, associativities, write policies, and number of hierarchy levels.…”
Section: Related Workmentioning
confidence: 99%
“…Fortunately, several black-box cloning techniques have demonstrated high level of accuracy in capturing different aspects of the memory behavior. For this paper, we will give a brief overview of the state-of-art cloning techniques: STM [2], [23], MeToo [23], [24] and MEMST [4], and describe STM in more details.…”
Section: Memory Behavior Cloningmentioning
confidence: 99%
“…MicroProbe integrates both functionalities into the same framework. This allows, for instance, the definition of user-guided drivers that query the 1 The user manually or using an external tool has to obtain the information to pass the appropriate inputs to the code generator. micro-architecture information in order to guide the search.…”
Section: Design Space Exploration Modulementioning
confidence: 99%
“…The number of frameworks proposed since then has been growing continuously corroborating their importance for the community. In contrast to our adaptive framework, particular solutions -without the micro-architecture semantics of MicroProbewere developed for different purposes: to generate synthetic microbenchmarks [2][3][4]26], to be able to reproduce proprietary application behavior [30,32], to perform architecture explorations [31], to generate power or reliability stress tests [20,21,33,39], to evaluate energy efficiency of systems [13], or to model cache behavior [1].…”
Section: Related Workmentioning
confidence: 99%
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