2012
DOI: 10.4028/www.scientific.net/ssp.195.42
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Wet Etching Behavior of Poly-Si in TMAH Solution

Abstract: Since Tetramethylammonium Hydroxide (TMAH) became widely used as a silicon etchant, e.g. the dummy gate removal for gate-last approach (RMG) [1, or Si fin formation on FinFET [, some careful preparations and optimizations have required implementation. These adaptations have involved not only chemical-related issues, but also hardware-related in order to satisfy the necessary process performance.

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Cited by 5 publications
(4 citation statements)
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“…In the nano-scale transistors, the replacement metal gate (RMG) was introduced by using dummy gate (poly silicon) and dummy gate oxide (silicon dioxide) to go through all the high-temperature annealing processes [ 228 ]. This gate oxide is eventually removed in a wet-etch process by using quaternary ammonium hydroxide (QAH) and hydrogen fluoride acid-based solutions [ 229 , 230 , 231 ], respectively. There are many merits for RMG.…”
Section: Wet Cleaningmentioning
confidence: 99%
“…In the nano-scale transistors, the replacement metal gate (RMG) was introduced by using dummy gate (poly silicon) and dummy gate oxide (silicon dioxide) to go through all the high-temperature annealing processes [ 228 ]. This gate oxide is eventually removed in a wet-etch process by using quaternary ammonium hydroxide (QAH) and hydrogen fluoride acid-based solutions [ 229 , 230 , 231 ], respectively. There are many merits for RMG.…”
Section: Wet Cleaningmentioning
confidence: 99%
“…The replacement metal gate (RMG) was introduced by using poly-Si as dummy gate and SiO 2 as dummy gate oxide [131] where eventually these layers are removed with wet process by means of none metal alkaine solutions, as shown in Figure 19 [132][133][134]. One of benefits of RMG is to avoid crystallization of the high-k dielectric during the rapid thermal annealing (RTA) process for dopants activation [135].…”
Section: Gate Processmentioning
confidence: 99%
“…Compared to the 2D devices, the RMG for 3D structures are even more complicated as shown for vertically stacked nanowire process in Figure 20. Firstly, poly-Si dummy gate has to be completely removed without any residues in narrow and steep trenches [132][133][134], otherwise, due to chemical nature of the HF-based wet etchant for the dummy gate oxide etching could not remove the poly-Si without any oxidizer [137][138][139]. Therefore, the residues occupy the space where the high-k and metal gates should be filled in, which might cause device failure.…”
Section: Gate Processmentioning
confidence: 99%
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