In recent years researchers have been focusing on the design of low power and
small size oscillator for emerging areas of interest such as the internet of
things (IoT) and biomedical applications. In this paper a new delay block
for ring oscillator is proposed using CMOS inverter cascaded with inverted
current starved inverter (CICSI). The designed delay block provides
approximately 50% more delay with a smaller number of transistors than the
conventionally designed circuits. Furthermore, a ring oscillator and a
non-overlapping clock (NOC) generator are designed using it. The designed
circuits can be used in switched capacitor (SC) circuits, analog mixed
signal circuits to meet the need for low frequency portable biomedical
applications. The designed circuits are simulated on Generic 90nm 1.2V
Process Design Kit (GPDK90) using Cadence Virtuoso Design Environment. The
simulation result shows the delay of the CICSI delay block is 592ps. The
ring oscillator using 101 stages of delay block is designed and it is shown
that it operates at a frequency of 17MHz with a power consumption of 420?W.