Workload and network-optimized computing systems

Abstract

This paper describes a recent system-level trend toward the use of massive on-chip parallelism combined with efficient hardware accelerators and integrated networking to enable new classes of applications and computing-systems functionality. This system transition is driven by semiconductor physics and emerging network-application requirements. In contrast to general-purpose approaches, workload and network-optimized computing provides significant cost, performance, and power advantages relative to historical frequency-scaling approaches in a serial computational model. We highlight the advantages of on-chip network optimization that enables efficient computation and new services at the network edge of the data center. Software and application development challenges are presented, and a service-oriented architecture application example is shown that characterizes the power and performance advantages for these systems. We also discuss a roadmap for next-generation systems that proportionally scale with future networking bandwidth growth rates and employ 3-D chip integration methods for design flexibility and modularity.

IBM's PowerEN Developer Cloud: Fertile ground for academic research

“…The exploitation of process and thread parallelism has been a hot research topic for decades and even more so ever since chip multi-processors became popular [4]. Parallelism needs to be addressed at all levels of the software stack, from the operating system to runtime environments and middleware, to programming languages and applications [16]. Application behavior analysis and development of ground breaking parallelization tools can certainly make use of PowerEN with its 256 hardware threads in a 4-chip SMP configuration.…”

Case studies in hardware XPath acceleration

“…XML processing in particular is compute intensive, and is therefore a good candidate for performance improvement by accelerators. Indeed, XML accelerators have been shown to be highly effective in increasing the overall performance of a system, with recent examples being in the context of network-optimized systems [19], including IBM's WebSphere DataPower SOA Appliances [16], which allow customers to move common XML processing "into the network" and offload application servers. These systems focus on accelerated XML parsing, schema validation, and XSLT processing, within a network processing scenario that includes additional non-XML processing functions.…”

A study in rapid prototyping: Leveraging software and hardware simulation tools in the bringup of system-on-a-chip based platforms

“…(For a complete review of the PowerEN TM architecture see [1]). The combination of integrated I/O with the accelerators and a massively multithreaded (MMT) capability targeting many sessions of parallel processing is ideally suited for many edge of network applications [2].…”