X-ray speed reading: enabling fast, low noise readout for next-generation CCDs

Herrmann, Sven; Orel, Peter; Chattopadhyay, Tanmoy; Morris, Glenn E.; Prigozhin, G.; Donlon, Kevan; Foster, Richard S.; Bautz, Marshall W.; Allen, S. W.; Leitz, Christopher

doi:10.1117/12.2630195

Cited by 4 publications

(4 citation statements)

References 10 publications

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“…We also review recent developments of our focal plane performance, which continue a multi-year effort to develop fast, low-noise detectors for future strategic X-ray missions. [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20] We finally demonstrate that the advanced technology is on track to reach the required technical readiness level for the AXIS mission.…”

Section: Axis Mission Parametersmentioning

confidence: 78%

“…The readout ASIC development and testing has been underway for several years at Stanford University, with the current MCRC v1.0 showing excellent performance, [14][15][16][17]19 as summarized in Table 5. The integrated readout chip outperforms the established discrete electronics in all parameters, at a fraction of the power consumption.…”

Section: Mcrc Asic Performancementioning

confidence: 99%

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The high-speed x-ray camera on AXIS

Miller,

Bautz,

Grant

et al. 2023

UV, X-Ray, and Gamma-Ray Space Instrumentation for Astronomy XXIII

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AXIS is a Probe-class mission concept that will provide high-throughput, high-spatial-resolution x-ray spectral imaging, enabling transformative studies of high-energy astrophysical phenomena. To take advantage of the advanced optics and avoid photon pile-up, the AXIS focal plane requires detectors with readout rates at least 20 times faster than previous soft x-ray imaging spectrometers flying aboard missions such as Chandra and Suzaku, while retaining the low noise, excellent spectral performance, and low power requirements of those instruments. We present the design of the AXIS high-speed x-ray camera, which baselines large-format MIT Lincoln Laboratory CCDs employing low-noise pJFET output amplifiers and a single-layer polysilicon gate structure that allows fast, low-power clocking. These detectors are combined with an integrated high-speed, low-noise ASIC readout chip from Stanford University that provides better performance than conventional discrete solutions at a fraction of their power consumption and footprint. Our complementary front-end electronics concept employs state of the art digital video waveform capture and advanced signal processing to deliver low noise at high speed. We review the current performance of this technology, highlighting recent improvements on prototype devices that achieve excellent noise characteristics at the required readout rate. We present measurements of the CCD spectral response across the AXIS energy band, augmenting lab measurements with detector simulations that help us understand sources of charge loss and evaluate the quality of the CCD backside passivation technique. We show that our technology is on a path that will meet our requirements and enable AXIS to achieve world-class science.

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Section: Axis Mission Parametersmentioning

confidence: 78%

Section: Mcrc Asic Performancementioning

confidence: 99%

The high-speed x-ray camera on AXIS

Miller,

Bautz,

Grant

et al. 2023

UV, X-Ray, and Gamma-Ray Space Instrumentation for Astronomy XXIII

Self Cite

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show abstract

“…This new baseline level not only uses a larger number of samples and therefore has lower white noise contribution, but it can be interpreted as the interpolation of the baseline value at the signal midpoint and therefore, the effect of slow moving variations is cancelled out, resulting in an improved overall noise performance. This approach works only because, SiSeROs do not suffer from reset or KTC noise and such, the baseline (i.e., the transistor state with an empty buried back gate) is expected to be always the same 27 . Here the baseline and signal values can be estimated using either box-averaging or cusp-averaging of the samples.…”

Section: Noise Characterization Of Siserosmentioning

confidence: 99%

“…This approach works only because, SiSeROs do not suffer from reset or KTC noise and such, the baseline (i.e., the transistor state with an empty buried back gate) is expected to be always the same. 27 Here the baseline and signal values can be estimated using either boxaveraging or cusp-averaging of the samples. In case of cusp-averaging, we compute the signal values by employing double-sided cusp as shown in Fig.…”

Section: Double-baseline Filteringmentioning

confidence: 99%

Improved noise performance from the next-generation buried-channel p-MOSFET SiSeROs

Chattopadhyay

Herrmann

Kaplan

et al. 2023

J. Astron. Telesc. Instrum. Syst.

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The Single-Electron Sensitive Read Out (SiSeRO) is an on-chip charge detector output stage for charge-coupled device image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the onchip transistor to characterize the device. In our earlier work, we characterized a number of first prototype SiSeROs with the MOSFET transistor channels at the surface layer. An equivalent noise charge of around 15 electrons root mean square was obtained. In this work, we examine the first buried-channel SiSeRO. We have achieved substantially improved noise performance of around 4.5e − RMS and a full-width half-maximum energy resolution of 132 eV at 5.9 keV, for a readout speed of 625 kpixel∕s. We also discuss how digital filtering techniques can be used to further improve the SiSeRO noise performance. Additional measurements and device simulations will be essential to further mature the SiSeRO technology. This new device class presents an exciting technology for the next-generation astronomical x-ray telescopes requiring fast, low-noise, radiation-hard megapixel imagers with moderate spectroscopic resolution.

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CMOS image sensors for x-ray interferometry

Buggey,

Hubbard,

Stefanov

et al. 2024

X-Ray, Optical, and Infrared Detectors for Astronomy XI

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X-ray interferometry (XRI) was first demonstrated in the early 2000's, and many early mission concepts followed which exploited the significant improvement in spatial resolution that XRI offered. Unfortunately, optical technology was not mature enough to meet the requirements, and the idea remained dormant. ESA's voyage 2050 programme, in combination with optical and pointing accuracy technology developments, has reignited interest in the concept, but large technological challenges still remain to realise such a groundbreaking telescope. Given the spectral and now spatial requirements of a XRI, the next generation of detector technologies must be developed which can meet those requirements to enable such a telescope.For the proposed ESA THESEUS X-ray astronomy mission, strict requirements on instrument operating temperature (-40 °C) have necessitated developments of new detectors technologies, namely CMOS image sensors (CIS). The CEI, in collaboration with Te2v, have designed, manufactured, and characterised a monolithic fully depleted CIS specifically optimised for soft X-ray astronomy. The prototype detector currently meets the THESEUS soft X-ray imager requirements and boasts a near Fano-limited energy resolution of 130 eV (@5.9 keV) at -40°C. Although the new technology can perform well, the specific detector requirements of XRI need to balance opposing parameters of spatial and energy resolution. This paper will outline the current performance of the CIS221-X for soft X-ray astronomy (as well as other competing technologies) and describe future plans for developing CIS to meet the challenging requirements of XRI.

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X-ray speed reading: enabling fast, low noise readout for next-generation CCDs

Cited by 4 publications

References 10 publications

The high-speed x-ray camera on AXIS

The high-speed x-ray camera on AXIS

Improved noise performance from the next-generation buried-channel p-MOSFET SiSeROs

CMOS image sensors for x-ray interferometry

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