z990 NetMessage-protocol-based processor to support element communication interface

Abstract

The communication interface between support element applications and applications running on the zSeries system processors is an essential part of the zSeries system design. For example, the interface is used to load firmware during startup, it is used for service actions such as configuring or deconfiguring I/O channels, and for many other functions. It must be fast, reliable, and failsafe. A special hardware interface in the clock chip is used to connect the service infrastructure (support element and cage controller) to the central electronic complex (CEC). Four firmware parties are involved in the communication: support element, cage controller, and two firmware layers running on the processors in the CEC: millicode and i390 code. Starting with the z900, the interface between the support element and cage controller was implemented using the NetMessage protocol, whereas the interface between the cage controller and processors still used the legacy service-word communication protocol from previous IBM S/390 models. This meant that the cage controller had to translate the NetMessage protocol from the support element side to the legacy service-word protocol toward the CEC side. In the z990, the communication interface between the support element and the CEC was generally replaced by the NetMessage protocol. The following paper describes the new design and structure of the support element to CEC communication.

Innovations in infrastructure firmware for the IBM z13

“…This service network is based on Ethernet technology. The protocol being used for this communication is described in [9]. For compatibility with older controller hardware Internet Protocol (IP) v4 addressing is used within the service network.…”

Run-control migration from single book to multibooks

“…(C2C: clock to clock, the interface between clock chips for data exchange; CLK: clock chip; CSE: clock-support element, the interface to PU chips for data exchange; ETR: external time reference; MBA: memory bus adapter; MSC: memory storage controller chip; RCtrl: run control, the interface to all chips of a book for run-control functions; SCC: SCE control chip; SCD: SCE data chip; SE-ETR: the internal service element (SE) interface to the external time reference (ETR) logic; Shift: interface to all chips of a book for shifting; SIF: serial interface, the interface to cache chips for data exchange; SSI: system support interface, the interface to and from the FSP; XM: X-message, the internal clock-chip logic responsible for service word communication [5].) PU …”