Zero-Sequence Circulating Current Reduction Method for Parallel HEPWM Inverters Between AC Bus and DC Bus

Chen, Tsung-Po

doi:10.1109/tie.2011.2106102

Cited by 126 publications

(45 citation statements)

References 35 publications

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“…It is also similar to the rectifier analysis in [6]. In most of the research articles, derivation or ZSCC cancellation has been carried out for two inverters or APF sh units [7][8][9][10][11]. Moreover, the control methods discussed in the literature are mainly for PWM based control system.…”

Section: Model For Zscc Flowmentioning

confidence: 95%

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Selection of Design Parameters to Reduce the Zero-Sequence Circulating Current Flow in Parallel Operation of DC Linked Multiple Shunt APF Units

Khadem¹,

Basu²,

Conlon³

2013

Advances in Power Electronics

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Capacity enhancement and operational flexibility are two of the important limitations of the centralized shunt APF (APF sh ) unit. These limitations can be conquered by the operation of multiple APF units in parallel and connected back to back by a common DC link capacitor. In that case, a circulating current (CC) flows within the APF sh units. This CC flow becomes out of control when the APF sh units operate in hysteresis based current controlled mode. One of the difficulties of this CC flow control or reduction is the variable switching frequency of the APF sh units. In this paper, the model for CC flow is derived by the switching dynamics study of the APF sh units. It is found that the selection of design parameters plays an important role in the amount of CC flow. Detailed simulation, analysis, and real-time performance show how the selection of design parameters affects the CC flow and the reduction of CC flow can also be achieved at an acceptable level by the proper selection of design parameters.

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Section: Model For Zscc Flowmentioning

confidence: 95%

“…In most of the cases, the methods are discussed for the parallel operation of inverter or rectifier [6][7][8][9][10]. Very few of the articles show the ZSCC reduction for the parallel operation of APF sh units [11].…”

Section: Introductionmentioning

confidence: 99%

Selection of Design Parameters to Reduce the Zero-Sequence Circulating Current Flow in Parallel Operation of DC Linked Multiple Shunt APF Units

Khadem¹,

Basu²,

Conlon³

2013

Advances in Power Electronics

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“…An additional component of interest in interleaved converter legs is that of the zero-sequence circulating current (ZSCC) [9], [12], [13], defined as…”

Section: B Converter Switching States and Circulating Currentmentioning

confidence: 99%

“…Furthermore, interleaved connection of converter legs generates zero-sequence circulating current (ZSCC) between the dc and ac side, increasing the semiconductor ratings and both conduction and switching losses of such topologies [9]. When the converters are operated with relatively high switching frequencies (i.e.…”

Section: Introductionmentioning

confidence: 99%

“…However, exact elimination of harmonics is critical to the timing of transitions and deviation from the pre-calculated patterns can have an adverse effect on the accuracy of the method. Previous efforts on control of circulating currents focused on the minimisation of the ZSCC [9], [12], [13] by introducing additional transitions and eliminating low-order triplen harmonics. Such methods effectively increase the converter switching frequency [9] and limit the range where SHE-PWM solutions can be found as inclusion of triplen harmonics in the formulation transforms the problem from three-phase to single-phase [14].…”

Section: Introductionmentioning

confidence: 99%

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Reducing circulating currents in interleaved converter legs under selective harmonic elimination pulse-width modulation

Konstantinou

Pou

Capella

et al. 2015

2015 IEEE International Conference on Industrial Technology (ICIT)

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Abstract-Interleaving of voltage source converter legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. Different switching patterns between the converter legs increase the number of Thevenin output voltage levels and, hence, the quality of the waveform but also generate circulating currents within one phase. This paper proposes a controller for interleaved converter legs under selective harmonic elimination pulse-width modulation (SHE-PWM) aimed at reducing the circulating current within the legs of each phase. The controller is used in combination with optimally selected SHE-PWM patterns to minimise the peak value of the circulating current. The proposed controller is applied in two interleaved three-level active neutral-pointclamped converters and simulation results demonstrate their performance.

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Adaptive modulation index‐based controller for suppression of circulating current in parallel inverters of autonomous microgrid

Hasan

Parida

2020

Int Trans Electr Energ Syst

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This paper proposes a control scheme to reduce the circulating current in parallel inverters of autonomous microgrid. The proposed scheme is based on adaptive modulation index, which is generated by a controller operating along with conventional voltage-current-droop controller. Three-phase inverters are connected in parallel for increased power capability and reliability. These paralleled inverters share common load in a desired ratio with the help of droop controller. One of the operational challenges in paralleled inverter system is that of circulating current which causes power loss, decreased efficiency, current distortion and reduced life. In order to reduce the circulating current, the reference modulation index is adjusted adaptively through an independent controller. The original modulation index is revised by making proportional adjustment toward voltage and current drop errors. This way, the proposed controller works independently and does not affect the performance of conventional droop controller. The design procedure for the proposed controller based on system modeling is also presented in the paper. The effectiveness of proposed controller is verified through simulation and experimental validation. A comparison of performance with a recently published PID-based coordinated controller is also presented. The results establish the superiority of proposed scheme for balanced, unbalanced and nonlinear load conditions.

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Zero-Sequence Circulating Current Reduction Method for Parallel HEPWM Inverters Between AC Bus and DC Bus

Cited by 126 publications

References 35 publications

Selection of Design Parameters to Reduce the Zero-Sequence Circulating Current Flow in Parallel Operation of DC Linked Multiple Shunt APF Units

Selection of Design Parameters to Reduce the Zero-Sequence Circulating Current Flow in Parallel Operation of DC Linked Multiple Shunt APF Units

Reducing circulating currents in interleaved converter legs under selective harmonic elimination pulse-width modulation

Adaptive modulation index‐based controller for suppression of circulating current in parallel inverters of autonomous microgrid

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