2016
DOI: 10.1109/led.2015.2505613
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Zinc Oxide Integrated Wavy Channel Thin-Film Transistor-Based High-Performance Digital Circuits

Abstract: High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high perf… Show more

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Cited by 7 publications
(3 citation statements)
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“…To determine the exact origin of the improved electrical characteristics for narrow W FIN values, the electric field distribution in a 3-D CNT-FET was simulated using a 3-D numerical simulator (COMSOL) based on the finite element method (FEM) (Figure c). All device dimensions used in the simulation were obtained from measurements made using the actual TEM image (Figure a); other important parameters were taken from previous studies. The detailed simulation conditions and parameters are provided in the Supporting Information, Figure S5. In the simulation, a common gate voltage ( V G ) of −2 V was applied to the gate electrode of the 3-D CNT-FET with different W FIN values (50, 150, and 300 nm), and the peak electric field at the CNTs adhering to the 3-D frame was extracted.…”
Section: Resultsmentioning
confidence: 99%
“…To determine the exact origin of the improved electrical characteristics for narrow W FIN values, the electric field distribution in a 3-D CNT-FET was simulated using a 3-D numerical simulator (COMSOL) based on the finite element method (FEM) (Figure c). All device dimensions used in the simulation were obtained from measurements made using the actual TEM image (Figure a); other important parameters were taken from previous studies. The detailed simulation conditions and parameters are provided in the Supporting Information, Figure S5. In the simulation, a common gate voltage ( V G ) of −2 V was applied to the gate electrode of the 3-D CNT-FET with different W FIN values (50, 150, and 300 nm), and the peak electric field at the CNTs adhering to the 3-D frame was extracted.…”
Section: Resultsmentioning
confidence: 99%
“…The novel architecture thus allows boosting performance of the smallest reliable L g without changing V T or I OFF . We have previously shown the same architecture on rigid substrates, where it has demonstrated the ability to leverage 2 × drive current per unit chip area when compared with planar TFT as well as to improve performance of digital circuits significantly . In this work, we demonstrate the novel architecture ability to drive LEDs at 70% higher currents compared with conventional coplanar TFTs integrated on the same substrate.…”
mentioning
confidence: 75%
“…We have previously shown the same architecture on rigid substrates, where it has demonstrated the ability to leverage 2 × drive current per unit chip area when compared with planar TFT [19][20][21][22] as well as to improve performance of digital circuits significantly. [23][24][25] In this work, we demonstrate the novel architecture ability to drive LEDs at 70% higher currents compared with conventional coplanar TFTs integrated on the same substrate. Figure 1a illustrating the device schematics for both coplanar TFT architecture (top) and the proposed wavy architecture (bottom), which shows the added device width due to sidewalls of the etched structural layer (α-Si in this case).…”
Section: Flexible Displaysmentioning
confidence: 99%