ZombieNAND: Resurrecting Dead NAND Flash for Improved SSD Longevity

Wilson, Ellis; Kandemir, Mahmut

doi:10.1109/mascots.2014.37

Cited by 11 publications

(6 citation statements)

References 5 publications

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“…Prior work proposes to increase margins by dynamically reducing the number of bits stored within a cell, e.g., by going from three bits that encode eight states (TLC) to two bits that encode four states (equivalent to MLC), or to one bit that encodes two states (equivalent to SLC) [21,190]. Recall that TLC uses the ER state and 22 states P1-P7, which are spaced out approximately equally.…”

Section: Normalized Lifetimementioning

confidence: 99%

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Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives

et al. 2017

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NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades. This positive growth is a result of two key trends: (1) effective process technology scaling; and (2) multi-level (e.g., MLC, TLC) cell data coding. Unfortunately, the reliability of raw data stored in flash memory has also continued to become more difficult to ensure, because these two trends lead to (1) fewer electrons in the flash memory cell floating gate to represent the data; and (2) larger cell-to-cell interference and disturbance effects. Without mitigation, worsening reliability can reduce the lifetime of NAND flash memory. As a result, flash memory controllers in solid-state drives (SSDs) have become much more sophisticated: they incorporate many effective techniques to ensure the correct interpretation of noisy data stored in flash memory cells. In this article, we review recent advances in SSD error characterization, mitigation, and data recovery techniques for reliability and lifetime improvement. We provide rigorous experimental data from state-ofthe-art MLC and TLC NAND flash devices on various types of flash memory errors, to motivate the need for such techniques. Based on the understanding developed by the experimental characterization, we describe several mitigation and recovery techniques, including (1) cell-to-cell interference mitigation; (2) optimal multi-level cell sensing; (3) error correction using state-of-the-art algorithms and methods; and (4) data recovery when error correction fails. We quantify the reliability improvement provided by each of these techniques. Looking forward, we briefly discuss how flash memory and these techniques could evolve into the future.

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Section: Normalized Lifetimementioning

confidence: 99%

“…Table 3 shows the techniques we overview and which errors (from Section 4) they mitigate. 36,62,190,193] (Section 5.7)…”

Section: Error Mitigationmentioning

confidence: 99%

Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives

et al. 2017

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show abstract

“…Prior work proposes to increase margins by dynamically reducing the number of bits stored within a cell, e.g., by going from three bits that encode eight states (TLC) to two bits that encode four states (equivalent to MLC), or to one bit that encodes two states (equivalent to SLC) [26,272]. Recall that TLC uses the ER state and states P1-P7, which are spaced out approximately equally.…”

Section: Normalized Lifetimementioning

confidence: 99%

Errors in Flash-Memory-Based Solid-State Drives: Analysis, Mitigation, and Recovery

Cai,

Ghose,

Haratsch

et al. 2017

Preprint

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“…Prior work proposes to increase margins by dynamically reducing the number of bits stored within a cell, e.g., by going from three bits that encode eight states (TLC) to two bits that encode four states (equivalent to MLC), or to one bit that encodes two states (equivalent to SLC) [30,346]. Recall that TLC uses the ER state and states P1-P7, which are spaced out approximately equally.…”

Section: Adaptive Error Mitigation Mechanismsmentioning

confidence: 99%

“…We develop a unified model of retention loss and wearout for the RBER, threshold voltage distribution, and V opt in 3D NAND flash memory. There is a large body of prior work that proposes mechanisms to mitigate planar NAND flash memory errors [23,25,26,27,28,34,35,36,37,101,102,116,128,135,191,204,205,263,264,346,377]. In Section 6.3, we have already compared our mechanisms to several of these techniques that are state-of-the-art, and have shown that prior techniques developed for planar NAND flash memory are less effective in 3D NAND flash memory than our techniques due to the new error characteristics of 3D NAND flash memory.…”

Section: Related Workmentioning

confidence: 99%

Architectural Techniques for Improving NAND Flash Memory Reliability

Luo¹

2018

Preprint

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First of all, I would like to thank my adviser, Onur Mutlu, for always trusting me to do good work, encouraging me whenever a paper gets rejected, giving me enough resources and opportunities to do great research, and pushing me to keep improving my presentation and writing skills.I am grateful to Saugata Ghose, Yu Cai, and Erich Haratsch for being both my mentors and collaborators. I am grateful to the members of my PhD committee: Phillip Gibbons and James Hoe for their valuable feedback and for making the final steps towards my PhD very smooth. I am grateful to Deb Cavlovich who allowed me to focus on my research by magically solving all other problems.I am grateful to SAFARI group members that were more than just lab mates. Saugata Ghose was not only a great mentor and collaborator to me who helped me improve in all aspects, but also a great friend who was always available for help. Hongyi Xin was like a big brother to me who was always supportive and gave me kind advice that kept me on track during my early struggles, and was never disappointing to have a fun discussion with about bioinformatics or history. Rachata Ausavarungnirun was a fantastic cook and was always kind to share his delicious food that reminded me of my grandmother's cooking. Donghyuk Lee encouraged me when it was most needed, and taught me his highest work ethic and kindness by example. Justin Meza helped me improve my writing and presentation skills during my early years in a very friendly manner. Chris Fallin was kind and patient enough to share his wisdom and time for insightful research discussions, which helped to improve my research skills. Kevin Chang was a perfect role model for me to follow, who also happened to share similar hobbies with me. Yoongu Kim pushed me to work harder and keep improving my research, and set a high standard for the group in terms of quality of research, writing, and presentation. Vivek Seshadri, Gennady Pekhimenko, Samira Khan were always eager to share valuable research and career advice. Kevin Hsieh was a great roommate at the PDL Retreat, and was always friendly to chat with. Amirali Boroumand was a nice buddy until he coldbloodedly left us for nicer weather in California. I also thank other members of the SAFARI group for their assistance and support:

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ZombieNAND: Resurrecting Dead NAND Flash for Improved SSD Longevity

Cited by 11 publications

References 5 publications

Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives

Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives

Errors in Flash-Memory-Based Solid-State Drives: Analysis, Mitigation, and Recovery

Architectural Techniques for Improving NAND Flash Memory Reliability

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