ZyCAP: Efficient Partial Reconfiguration Management on the Xilinx Zynq

Are Coarse-Grained Overlays Ready for General Purpose Application Acceleration on FPGAs?

“…Furthermore, the commonly used configuration mechanism is highly sub-optimal in terms of throughput [15]. Despite numerous efforts in reducing reconfiguration times and improving CAD tool support for dynamic reconfiguration of FPGA fabric [16], [13], the implementation of rapidly reconfigurable hardware accelerators is still difficult.…”

Accelerated Artificial Neural Networks on FPGA for Fault Detection in Automotive Systems

“…We use the open source ZyCAP configuration management system, integrated as a peripheral to the processing system, with its own software libraries/drivers [23]. It handles low level reconfiguration commands, bitstream memory management and abstracts the details from our application design.…”

Virtualized FPGA Accelerators for Efficient Cloud Computing

“…More recently, integrated systems on chip, combining both general purpose processors and FPGAs have emerged, such as the Xilinx Zynq, offering extremely high data bandwidth between the processor and FPGA, allowing for high performance applications with interleaved hardware and software execution. Coupling is of great importance as slow communication can severely decimate the potential benefits of acceleration [10]. Recent FPGAs support very high bandwidth serial communication interfaces, including PCI Express (PCIe), allowing them to be integrated in standard computing infrastructure, with saturated interface bandwidth.…”