π-Cipher: Authenticated Encryption for Big Data

Gligoroski, Danilo; Mihajloska, Hristina; Samardjiska, Simona; Jacobsen, Håkon; Jensen, Rune Erlend; El-Hadedy, Mohamed

doi:10.1007/978-3-319-11599-3_7

Cited by 19 publications

(28 citation statements)

References 9 publications

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“…The rotator is responsible for left rotating the adder's outputs by different rotation values based on the algorithmic description of the π-Cipher [15].…”

Section: B Rotatormentioning

confidence: 99%

“…The XOR banks, as shown in Figure 2a and Figure 2b, are intermediate stages between the rotators outputs and the final stage of the engine, to maximize the diffusion of the bits [15]. The output data of both XOR banks are added to each other by using four 16-bit parallel ripple-carry adders, as shown in Figure 2c.…”

Section: Xor Bankmentioning

confidence: 99%

“…This will be followed by the exchange in the data direction flow between the ARX engine input ports. The exchange is made based on the mathematical model [15] shown in Figure 3. Using the introduced scheme, the pifunction three rounds data takes 675 cycles to complete.…”

Section: A π-Function Control Unitmentioning

confidence: 99%

“…This cipher is a parallelizable and incremental, sponge-based design. It is designed to accommodate words and blocks with different sizes, and different security levels [15], [16]. π-Cipher's design is based on several canonical cryptographic concepts but has some intrinsic new features.…”

Section: Introductionmentioning

confidence: 99%

“…Every * operation has as input two 4-tuples of ω-bit words (ω = 16, 32, 64) and performs in total 52 ARX operations on them. An algorithmic description of the * operation is given in More details about the π-Cipher can be found in the official documentation of the cipher [15].…”

Section: Introductionmentioning

confidence: 99%

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A 16-Bit Reconfigurable Encryption Processor for p-Cipher

El-Hadedy

Mihajloska

Gligoroski

et al. 2016

2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

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Abstract-This paper presents an improved hardware implementation of a 16-bit ARX (Add, Rotate, and Xor) engine for one of the CAESAR second-round competition candidates, π-Cipher, implemented on an FPGA. π-Cipher is a nonce-based authenticated encryption cipher with associated data. The security of the π-Cipher relies on an ARX based permutation function, which is denoted as a π-function. The proposed ARX engine has been implemented in just 266 slices, which includes the buffers of the input and the output. It can be clocked at 347 MHz. Also, in this paper, a message processor based on the proposed ARX engine is introduced. The message processor has been implemented in 1114 slices and it can be clocked at 250 MHz. The functionality of the proposed ARX engine was verified on the Xilinx Virtex-7. The new design of the ARX engine allows for almost four times speedup in performance while consuming only 17% larger area than previously published work. We extend our message processor implementation by using parametrized reconfiguration technique after which an area reduction of 27 slices is observed.

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“…The rotator is responsible for left rotating the adder's outputs by different rotation values based on the algorithmic description of the π-Cipher [15].…”

Section: B Rotatormentioning

confidence: 99%

Section: Xor Bankmentioning

confidence: 99%

Section: A π-Function Control Unitmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A 16-Bit Reconfigurable Encryption Processor for p-Cipher

El-Hadedy

Mihajloska

Gligoroski

et al. 2016

2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

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An acceleration of quasigroup operations by residue arithmetic

Krömer

Platoš

Nowaková

et al. 2017

Concurrency and Computation

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Quasigroup operations are essential for a wide range of cryptographic procedures that includes cryptographic hash functions, electronic signatures, pseudorandom number generators, and stream and block ciphers. Quasigroup cryptography achieves high levels of security at low memory and computational costs by an iterative application of quasigroup operations to streams and blocks of data. The use of large quasigroups can further improve the strength of cryptographic operations. However, the order of used quasigroups is the main factor affecting the memory requirements of quasigroup cryptographic schemes. Alternative quasigroup representations that do not store their multiplication tables in computer memory yield increased computational costs.In any case, an efficient implementation of quasigroup operations is critical for practical applications of quasigroup cryptography. Residue number systems allow a fast, concurrent realization of addition and multiplication. In this work, residue arithmetic is used to accelerate quasigroup operations, and an efficient computational approach to their implementation, designed with respect to the extended instruction sets of modern processors, is proposed. KEYWORDSacceleration, quasigroup operations, residue arithmetic, residue number systems, security INTRODUCTIONQuasigroups are algebraic structures with a large number of applications in cryptography and computer security. 1-5 A quasigroup consists of a set of elements (carrier) and a binary operation (multiplication) that maps every 2 of its elements onto a third element. Mathematically, they are grupoids closely related to the combinatorial concept of latin squares 2,3,6,7 and the geometric notion of k−nets (3−nets). 2,8 Multiplication (Cayley) tables of finite quasigroups can be expressed as latin squares, and k−nets can be coordinatized by systems of orthogonal quasigroups.In general, quasigroups are noncommutative, nonassociative, nonidempotent, and noninvolutory and do not have neutral elements. 9 These properties make them suitable for applications in cryptography, and they have been used as fundamental elements of a wide range of cryptographic algorithms with success. Their applications in this area include novel high-performance stream 4-6,10-13 and block 4,5,14-22 ciphers, cryptographic hash 4,5,23-27 and trapdoor 4,14,23 functions, fast and secure electronic signatures (eg, message authentication codes), 4,14,23,28 pseudorandom number generators, 5,29-31 error-detecting 2 and error-correcting 2,9,32 codes, and simultaneous encryption and error-correction coding (cryptcoding). 4Quasigroups can be also used to model cryptosystems based on other cryptographic primitives. A quasigroup representation has been devised for block ciphers based on Feistel networks (ie, Feistel and generalized Feistel ciphers). 33The attractiveness of quasigroups for practical cryptographic applications consists in the combination of provably strong security and inexpensive realization of quasigroup-based cryptographic operations. They support la...

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