基于量子点元胞自动机的超高效可逆块的纳米设计

The XOR gate is an essential element in the design of digital circuits due to its versatility and usefulness. The design of XOR gate in this paper is based on Quantum-dot Cellular Automata (QCA) 2D planner technology with no line-to-line intersections. The output amplitude is improved by redundant cell-based design, which also helped reliability and fault tolerance outperform. The proposed XOR gate achieves fault tolerance to single-cell addition and missing-cell defects from 68.48% to 95.33%. In addition, the proposed XOR gate is also fault-tolerant against multiple-cell missing defects, as verified from the simulations. Furthermore, high thermal stability makes the circuit reliable for QCA-based digital design applications. The digital design applications such as 4-bit B2G code converter and a 4-bit parity checker are designed from this XOR gate, utilizing 438 and 414 cells, respectively. This demonstrates its effectiveness in designing fault resilient and reliable circuit designs for various applications.

show abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

基于量子点元胞自动机的超高效可逆块的纳米设计

Cited by 5 publications

References 28 publications

An ultra-efficient design of fault-tolerant 3-input majority gate (FTMG) with an error probability model based on quantum-dots

An ultra-efficient design of fault-tolerant 3-input majority gate (FTMG) with an error probability model based on quantum-dots

Designing an ultra-efficient Hamming code generator circuit for a secure nano-telecommunication network

QCA-based fault-tolerant XOR Gate for reliable computing with high thermal stability

Contact Info

Product

Resources

About