This paper addresses the integration of a new generation of high-speed SiGe HBTs with fT /fmax of 300/500 GHz and minimum CML ring oscillator gate delays of 2.0 ps in a 0.13 µm BiCMOS technology. Technological measures for improving the speed of the HBTs compared to our first 0.13 µm BiCMOS generation are discussed. These include scaling of lateral device dimensions and doping profiles as well as a reduced thermal budget and reduced salicide resistance.

A SiGe HBT technology featuring f T /f max /BV CEO =300GHz/ 500GHz/1.6V and a minimum CML ring oscillator gate delay of 2.0 ps is presented. The speed-improvement compared to our previous SiGe HBT generations originates from lateral device scaling, a reduced thermal budget, and changes of the emitter and base composition, of the salicide resistance as well as of the low-doped collector formation.

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The conduction process as well as the unipolar resistive switching behavior of Au∕HfO2∕TiN metal-insulator-metal structures were investigated for future nonvolatile memory applications. With current-voltage measurements performed at different temperatures (200–400K), the Poole–Frenkel effect as conduction process was identified. In particular, we extracted a trap energy level at ϕt=0.35±0.05eV below the HfO2 conduction band to which a microscopic origin is tentatively assigned. From current-voltage measurements of Au∕HfO2∕TiN structures, low-power (as low as 120μW) resistive switching was observed. The required forming process is shown to be an energy-induced phenomenon. The characteristics include electric pulse-induced resistive switching by applying pulses up to 100μs and a retention time upon continuous nondestructive readout of more than 104s.

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